PCF8545ATT datasheet(35/50 Pages) NXP

35 / 50 page

NXP Semiconductors

PCA8561

Automotive 18 × 4 LCD segment driver

VDD = 1.8 V to 5.5 V; VSS = 0 V; Tamb = -40 °C to +105 °C; unless otherwise specified; all timing values are valid within the

operating supply voltage and Tamb range and are referenced to VIL and VIH with an input voltage swing of VSS to VDD. [1]

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

rise time of both SDA and

SCL signals

fSCL = 400 kHz

0.3

μs

fall time of both SDA and

SCL signals

0.3

μs

capacitive load for each

bus line

400

tw(spike)

spike pulse width

on the I2C-bus

Table 19. I2C-bus characteristics...continued

[1]

The I2C-bus interface of PCA8561 is 5 V tolerant.

SDA

mga728

SDA

SCL

tSU;STA

tSU;STO

tHD;STA

tBUF

tLOW

tHD;DAT

tHIGH

tSU;DAT

Figure 28. I2C-bus timing waveforms

VDD = 1.8 V to 5.5 V; VSS = 0 V; Tamb = -40 °C to +105 °C; unless otherwise specified; all timing values are valid within the

operating supply voltage and Tamb range and are referenced to VIL and VIH with an input voltage swing of VSS to VDD.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Pin SCL

fSCL

SCL clock frequency

MHz

tLOW

LOW period of the SCL

clock

150

tHIGH

HIGH period of the SCL

clock

rise time

100

fall time

100

Pin CE

Table 20. SPI-bus characteristics

PCA8561

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5 — 15 March 2021

35 / 50

PCF8545ATT データシート(PDF) 35 Page - NXP Semiconductors

PCF8545ATT データシート(HTML) 35 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

データシートダウンロード