848004AGI

www.icst.com/products/hiperclocks.html

REV. A AUGUST 18, 2005

7

Integrated

Circuit

Systems, Inc.

ICS848004I

PRELIMINARY

As in any high speed analog circuitry, the power supply pins

are vulnerable to random noise. The ICS848004I provides

separate power supplies to isolate any high switching

noise from the outputs to the internal PLL. V

should be individually connected to the power supply

plane through vias, and bypass capacitors should be

used for each pin. To achieve optimum jitter performance,

power supply isolation is required. Figure 1 illustrates how

a 10

Ω resistor along with a 10µF and a .01μF bypass

capacitor should be connected to each V

10

Ω

V

DDA

10

μF

.01

μF

3.3V

.01

μF

V

DD

The ICS848004I has been characterized with 18pF parallel reso-

nant crystals. The capacitor values shown in Figure 2 below

ICS848004I

C1

33p

X1

18pF Parallel Crystal

C2

27p

XTAL_OUT

XTAL_IN

were determined using a 26.5625MHz 18pF parallel resonant

crystal and were chosen to minimize the ppm error.