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ICS1002AI01L データシート(PDF) 8 Page - Integrated Circuit Systems |
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ICS1002AI01L データシート(HTML) 8 Page - Integrated Circuit Systems |
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8 / 13 page ![]() 8421002AGI-01 www.icst.com/products/hiperclocks.html REV. A FEBRUARY 6, 2006 8 Integrated Circuit Systems, Inc. ICS8421002I-01 FEMTOCLOCKS™CRYSTAL-TO- HSTL FREQUENCY SYNTHESIZER CRYSTAL INPUT INTERFACE The ICS8421002I-01 has been characterized with 18pF par- allel resonant crystals. The capacitor values shown in Figure Figure 2. CRYSTAL INPUt INTERFACE 2 below were determined using a 25MHz 18pF parallel reso- nant crystal and were chosen to minimize the ppm error. ICS8421002I-01 APPLICATION INFORMATION As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS8421002I-01 provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. V DD, VDDA, and VDDO should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. To achieve optimum jitter performance, power supply isolation is required. Figure 1 illustrates how a 10 Ω resistor along with a 10µF and a .01μF bypass capacitor should be connected to each V DDA. POWER SUPPLY FILTERING TECHNIQUES FIGURE 1. POWER SUPPLY FILTERING 10 Ω V DDA 10 μF .01 μF 3.3V or 2.5V .01 μF V DD C1 22p X1 18pF Parallel Crystal C2 22p XTAL_OUT XTAL_IN |
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