PS031601.3.1

© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012

Tel: (800)-VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com

Internet: www.vitesse.com

Product Summary

VSC8144

2.488Gb/s 4:1 SONET/SDH Transceiver with Integrated Clock Generator

Features

General Description

The VSC8144 is a SONET/SDH compatible multi-rate transceiver with integrated clock generator for use in

SONET/SDH systems operating at OC-48, OC-24, OC-12, OC-3, or Gigabit Ethernet data rates. The internal clock

generator uses a Phase Locked Loop (PLL) to multiply either a 77.76MHz, 155.52MHz, or 622.08MHz reference clock

for internal logic and output retiming. The 4-bit parallel LVDS interface incorporates an on-board FIFO to address loop

timing design issues. Facility and Equipment Loopbacks can be configured separately or simultaneously. The device

operates with 2.5 W maximum power and is packaged in a thermally enhanced 100-pin PQFP package.

Block Diagram

Order Information

Notice

Vitesse Semiconductor Corporation (“Vitesse”) provides this document for informational purposes only. This document contains pre-production information about Vit-

esse products in their concept, development and/or testing phase. All information in this document, including descriptions of features, functions, performance, technical

specifications and availability, is subject to change without notice at any time. Nothing contained in this document shall be construed as extending any warranty or

promise, express or implied, that any Vitesse product will be available as described or will be suitable for or will accomplish any particular task.

Vitesse products are not intended for use in life support appliances, devices or systems. Use of a Vitesse product in such applications without written consent is prohib-

ited.

Product

Package

VSC8144QQ

100-Pin PQFP

• Multi-Rate Transceiver for SONET OC-48, OC-24,

OC-12, OC-3, and Gigabit Ethernet Rates

• 4-Bit LVDS Low-Speed Interface

• On-Chip PLL-Based Clock Generator

• High-Speed Clock Output

• Equipment, Facility and Split Loopback Modes

• Exceeds Bellcore Jitter Performance

• Single 3.3V Power Supply

• 2.5 W Maximum Power Dissipation

• 100-Pin PQFP (14x14x2mm)

DEMUX

CMU

Test

FIFO

High-Speed Data

High-Speed Clock

High-Speed Loopback

Low-Speed Data

Low-Speed Clock

Low-Speed Loopback

Reference Clock

MUX

High-Speed Data

High-Speed Clock

Low-Speed Data

4

Low-Speed Clock

Low-Speed Clock

OC-48/12/3 GbE Control

VSC8144

4