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USB7002 データシート(PDF) 19 Page - Microchip Technology |
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USB7002 データシート(HTML) 19 Page - Microchip Technology |
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19 / 56 page ![]() 2022 Microchip Technology Inc. and its subsidiaries DS00002670G-page 19 USB7002 DP1_DISCHARGE I/O12 Port 1 DISCHARGE enable PRT_CTL4 I/O12 (PU) Port 4 power enable / overcurrent sense When the downstream port is enabled, this pin is set as an input with an internal pull-up resistor applied. The internal pull-up enables power to the downstream port while the pin monitors for an active low overcurrent signal assertion from an external current monitor on USB port 4. This pin will change to an output and be driven low when the port is dis- abled by configuration or by the host control. Note: This signal controls both the USB 2.0 and USB 3.2 portions of the port. PRT_CTL3 I/O12 (PU) Port 3 power enable / overcurrent sense When the downstream port is enabled, this pin is set as an input with an internal pull-up resistor applied. The internal pull-up enables power to the downstream port while the pin monitors for an active low overcurrent signal assertion from an external current monitor on USB port 3. This pin will change to an output and be driven low when the port is dis- abled by configuration or by the host control. Note: This signal controls both the USB 2.0 and USB 3.2 portions of the port. PRT_CTL2 I/O12 (PU) Port 2 power enable / overcurrent sense When the downstream port is enabled, this pin is set as an input with an internal pull-up resistor applied. The internal pull-up enables power to the downstream port while the pin monitors for an active low overcurrent signal assertion from an external current monitor on USB port 2. This pin will change to an output and be driven low when the port is dis- abled by configuration or by the host control. Note: This signal controls both the USB 2.0 and USB 3.2 portions of the port. PRT_CTL1 I/O12 (PU) Port 1 power enable / overcurrent sense When the downstream port is enabled, this pin is set as an input with an internal pull-up resistor applied. The internal pull-up enables power to the downstream port while the pin monitors for an active low overcurrent signal assertion from an external current monitor on USB port 1. This pin will change to an output and be driven low when the port is dis- abled by configuration or by the host control. Note: This signal controls both the USB 2.0 and USB 3.2 portions of the port. GPIOx I/O12 General Purpose Inputs/Outputs (x = 70-71, 76, 78, 82-83, 90-95) TABLE 3-6: PROGRAMMABLE FUNCTIONS DESCRIPTIONS (CONTINUED) Function Buffer Type Description |
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