| データシートサーチシステム |
|
BLF2425M9LS30 データシート(PDF) 2 Page - Ampleon Netherlands B.V. |
|
|
|||||||||||||||||||||||||||||
BLF2425M9LS30 データシート(HTML) 2 Page - Ampleon Netherlands B.V. |
|
2 / 12 page ![]() BLF2425M9L30_M9LS30 All information provided in this document is subject to legal disclaimers. © Ampleon Netherlands B.V. 2019. All rights reserved. Product data sheet Rev. 5 — 13 June 2019 2 of 12 BLF2425M9L30; BLF2425M9LS30 Power LDMOS transistor 2. Pinning information [1] Connected to flange. 3. Ordering information 4. Limiting values [1] Continuous use at maximum temperature will affect the reliability, for details refer to the online MTF calculator. Table 2. Pinning Pin Description Simplified outline Graphic symbol BLF2425M9L30 (SOT1135A) 1drain 2gate 3source [1] BLF2425M9LS30 (SOT1135B) 1drain 2gate 3source [1] 1 2 3 sym112 1 3 2 2 3 1 sym112 1 3 2 Table 3. Ordering information Type number Package Name Description Version BLF2425M9L30 - flanged ceramic package; 2 mounting holes; 2 leads SOT1135A BLF2425M9LS30 - earless flanged ceramic package; 2 leads SOT1135B Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage - 65 V VGS gate-source voltage 6+13 V Tstg storage temperature 65 +150 C Tj junction temperature [1] - 225 C |
|
|
リンク URL |
| ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | データシートへのリンク | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |