USB5742BTSLASH2G datasheet(12/48 Pages) MICROCHIP

12 / 48 page

USB5742B

DS00002016H-page 12

 2022 Microchip Technology Inc. and its subsidiaries

Note 2: Configuration strap values are latched on Power-On Reset (POR) and the rising edge of RESET_N (external

chip reset). Configuration straps are identified by an underlined symbol name. Signals that function as con-

figurations traps must be augmented with an external resistor when connected to a load. Refer to Section

3.4, "Configuration Straps and Programmable Functions" for additional information.

VBUS_DET

This signal detects the state of the upstream bus power.

When designing a detachable hub, this pin must be connected to the

VBUS power pin of the upstream USB port through a resistor divider

(50 k

 by 100 k) to provide 3.3 V.

For self-powered applications with a permanently attached host, this

pin must be connected to either 3.3 V or 5.0 V through a resistor

divider to provide 3.3 V.

In embedded applications, VBUS_DET may be controlled (toggled)

when the host desires to renegotiate a connection without requiring a

full reset of the device.

GPIO16

I/O6

General purpose input/output 16.

TABLE 3-5:

USB PORT CONTROL PIN DESCRIPTIONS

Num

Pins

Symbol

Buffer

Type

Description

PRT_CTL1

(PU)

Port 1 Power Enable / Overcurrent Sense.

Note:

If unused, leave floating.

As an output, this signal is an active high control signal used to enable

power to the downstream port 1. As an input, this signal indicates an

overcurrent condition from an external current monitor on USB port 1.

PRT_CTL2

(PU)

Port 2 Power Enable / Overcurrent Sense.

Note:

If unused, leave floating.

As an output, this signal is an active high control signal used to enable

power to the downstream port 2. As an input, this signal indicates an

overcurrent condition from an external current monitor on USB port 2.

TABLE 3-4:

USB 2.0 PIN DESCRIPTIONS (CONTINUED)

Num

Pins

Symbol

Buffer

Type

Description

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