DVR10 datasheet(17/416 Pages) MICROCHIP

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DS30010118D-page 17

PIC24FJ256GA705 FAMILY

TABLE 1-1:

DEVICE FEATURES FOR THE PIC24FJXXXGA702: 28-PIN DEVICES

Features

PIC24FJ64GA702

PIC24FJ128GA702

PIC24FJ256GA702

Operating Frequency

DC – 32 MHz

Program Memory (bytes)

64K

128K

256K

Program Memory

(instruction words, 24 bits)

22,528

45,056

88,064

Data Memory (bytes)

16K

Interrupt Sources

(soft vectors/NMI traps)

124

I/O Ports

Ports A, B

Total I/O Pins

Remappable Pins

18 (18 I/Os, 0 inputs only)

DMA

1 6-channel

16-Bit Timers

3(1)

Real-Time Clock and Calendar

(RTCC)

Yes

Cyclic Redundancy Check (CRC)

Yes

Input Capture Channels

3(1)

Output Compare/PWM Channels

3(1)

Input Change Notification Interrupt

21 (remappable pins)

Serial Communications:

UART

2(1)

SPI (3-wire/4-wire)

3(1)

I2C

Configurable Logic Cell (CLC)

2(1)

Parallel Communications

(EPMP/PSP)

Capture/Compare/PWM/Timer

Modules

4 Multiple CCPs

1 (6-output), 3 (2-output)

JTAG Boundary Scan

Yes

10/12-Bit Analog-to-Digital Converter

(A/D) Module (input channels)

Analog Comparators

CTMU Interface

Yes

Universal Serial Bus Controller

Resets (and Delays)

Core POR, VDD POR, BOR, RESET Instruction,

MCLR, WDT, Illegal Opcode, REPEAT Instruction,

Hardware Traps, Configuration Word Mismatch

(OST, PLL Lock)

Instruction Set

76 Base Instructions, Multiple Addressing Mode Variations

Packages

28-Pin QFN, UQFN, SOIC, SSOP and SPDIP(2)

Note 1:

Some peripherals are accessible through remappable pins.

28-Pin SPDIP is available only in the highest Flash variant.

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