AT24C01C datasheet(15/45 Pages) MICROCHIP

部品番号	AT24C01C

部品情報	I²C-Compatible (Two-Wire) Serial EEPROM 1‑Kbit (128 x 8), 2‑Kbit (256 x 8)

PDF	45 Pages

Scroll/Zoom	100%

メーカー	MICROCHIP [Microchip Technology]

ホームページ	http://www.microchip.com

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15 / 45 page

5.5

Software Reset

After an interruption in protocol, power loss or system Reset, any two‑wire device can be protocol reset

by clocking SCL until SDA is released by the EEPROM and goes high. The number of clock cycles until

SDA is released by the EEPROM will vary. The software Reset sequence should not take more than nine

dummy clock cycles. Once the software Reset sequence is complete, new protocol can be sent to the

device by sending a Start condition followed by the protocol. Refer to Figure 5-2 for an illustration.

Figure 5-2. Software Reset

SCL

Device is

SDA

Dummy Clock Cycles

SDA Released

Software Reset

by EEPROM

In the event that the device is still non-responsive or remains active on the SDA bus, a power cycle must

be used to reset the device (see Power-Up Requirements and Reset Behavior).

AT24C01C/AT24C02C

Device Operation and Communication

Datasheet

DS20006111A-page 15

AT24C01C データシート(PDF) 15 Page - Microchip Technology