Tri p ath Techn o l o g y, I n c. - T echn i cal I n fo rmation

13

TCA2002 – KLi/0.95/04.06

Figure 5 shows the basic single supply, bridged output amplifier using a TCA2002. The MOSFET

output stage operates from a single power supply, VPP (for instance 60VDC). Both terminals of the

speaker are actively driven. Differential feedback is taken from each half-bridge output. The resistor

divider networks at the TCA2002 scale the feedback signals. The resistor values are determined

based on the supply voltage, as explained below.

It should be noted that only one channel of the modulator is required to create a bridged amplifier.

This is done by reversing the Y1 and Y1B connections to the second FET driver. This creates an out

of phase signal at HB OUTN with respect to HB OUTP.

A bridged amplifier has the advantage of potentially 4 times the output power for a given supply rail.

But the disadvantage is that the required number of FET drivers and MOSFETs per channel

increases by a factor of two.

The modulator feedback resistors are:

Ω

=

1K

typically

specified,

User

1000

*

350

−

=

VPP

)

R

(1000

R

*

2333.33

R

FBC

FBC

FBB

+

=

1

R

*

R

)

R

(R

*

R

A

FBB

FBA

FBB

FBA

FBC

MODULATOR

-

V

+

+

≈

The resultant modulator gain is:

30.05V/V

1

2.21k Ω

*

1.0k Ω

)

2.21k

(1.0k Ω

*

20.0k Ω

A

MODULATOR

-

V

=

+

Ω

+

≈

Mute Cont rol

When a logic high signal is supplied to MUTE, both amplifier channels are muted (both high- and low-

side transistors are turned off). When a logic level low is supplied to MUTE, both amplifiers are fully

operational. Please note, that unlike previous Tripath controllers such as TC2000 and TC2001, the

state of MUTE does not effect the input stage biasing. Thus, even if MUTE is high, the bias at INV1

Please note that the TCA2002 requires about 250mS to become active, after the de-assertion of

MUTE (MUTE logic high

MUTE logic low). Also, the TCA2002 requires about 350uS to go into

mute, after the assertion of MUTE (MUTE logic low

logic high).

Break-Bef o re-Make (BBM) Timing Control

The TCA2002 can also insert a delay between the Yx and YxB output signals. This dead time will

minimize shoot thru currents, in the case that the output driver or power stage does not have built in

BBM circuitry. BBM0 and BBM1 are logic inputs (connected to logic high or pulled down to logic low)

that control the break-before-make timing of the output transistors according to the following table.