SIP32433, SIP32434

www.vishay.com

Vishay Siliconix

Revision: 01-Mar-2022

3

Document Number: 62068

For technical questions, contact: powerictechsupport@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

POWER INPUT AND OUTPUT TERMINALS

The power header terminals are designed to allow a power supply and load to be connected easily to the evaluation board (see

Fig. 1). The input voltage range for this evaluation is from 3.3 V to 23 V.

D2 is the Schottky diode placed next to the device output to clamp the negative voltage when abruptly switching off an inductive

load. A TVS diode can be placed at the input capacitor location in case input transient protection is required.

INPUT AND OUTPUT CAPACITORS

The input capacitors (C1 to C6) and output capacitors (C7, C8) are mounted close to the device to ensure a stable voltage right

before and after the eFuse load switch. The capacitances of these capacitors are 10 μF. The voltage rating for input and output

capacitors is 50 V. The SIP32433A, SIP32433B, SIP32434A, and SIP32434B can operate normally up to 23 V. It is important to

use capacitors rated at 35 V or higher for the input and output capacitors.

ENABLE AND UNDERVOLTAGE LOCKOUT TERMINAL

The header J13 is directly connected to the EN pin for the enable function of the device. The voltage rating of the EN pin is

28 V. The enable threshold voltage is 1.25 V and the disable threshold voltage is 1.05 V. A user-defined undervoltage protection

can be implemented with a voltage divider (Fig. 3)

Fig. 3 - Settable Undervoltage Protection With Designs

PG, POWER GOOD OUTPUT

The SIP32433A, SIP32433B, SIP32434A, and SIP32434B devices have power good output to indicate their operation. PG is an

open drain output pin. When there is no fault, and VOUT reaches 95 % of VIN, the PG is off. The header J11 is connected to the

PG of the device. An external bias voltage can be applied on header J3. The voltage rating of the power good is 28 V maximum.

The pull-high resistor connects it to the VIN through the J4 jumper when using the VIN as a PG high bias voltage source.

TABLE 3 - TEST POINTS DESCRIPTION

LABEL

NAME

DESCRIPTION

J27

OVP

OVP pin probe point

J25

OVP

OVP pin probe through a 100 k

Ω resistor

J18

GND

IC ground sense

J12

Gate

High enable gate of MOSFET that shorts the output to GND

J24

ISENSE

Differential sense of input current over a shunt resistor

J6

VOUT_S

Power output sense point

J19

GND

IC ground sense

J3

PG

PG pull-up voltage bias supply

J5

VIN_S

Power input sense point

TABLE 4 - JUMPER DESCRIPTION AND DEFAULT SETTING

LABEL

NAME

DESCRIPTION

J9

RL2

Connect load resistor

J10

RL3

Connect load resistor

J4

PG

Jumper that connects PG pull-up resistor to VIN

J17

RLIM

Jumper that connects R6 as a parallel current limit setting resistor to R5

J26

OVP

Jumper connects R10, OVP voltage divider upper resistor to be paralleled with R4

SIP3243xx

GND

R1

R2

Power

source

EN /

UVLO

IN