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L9960T データシート(PDF) 36 Page - STMicroelectronics

部品番号 L9960T
部品情報  Automotive Single/Dual H-Bridge, SPI programmable DC Brushed Motor Driver
PDF  95 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L9960T データシート(HTML) 36 Page - STMicroelectronics

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Functional description
L9960, L9960T
36/95
DS11115 Rev 10
Status of the SPI register (IN1_IN2_if) and its internally latched version are available
through SPI (configuration request 2: “(IN1_IN2_if)” echo and "IN1_IN2_if_latched_echo")
Figure 16. Bridge STATE diagram in IN1/IN2 mode
4.5.2
Disable inputs DIS and NDIS
The pin DIS is internally pulled-up and high active.
When DIS is active (set to HIGH), the bridge is set to disabled independently from the
internal clock (asynchronous switch-off path), whatever the state of the DIR and PWM
inputs. All the data stored in SPI registers are not reset and SPI communication with the
MCU is still possible.
When DIS is inactive (set to LOW) and NDIS is active (set to HIGH), the bridge is controlled
by the DIR and PWM inputs, synchronously. After DIS or NDIS release, the bridge waits for
the next PWM rising edge before being released from disable (see Note).
The pin NDIS is internally pulled down and high active.
When NDIS is inactive (set to LOW) either by NDIS pin or by protection schemes, the bridge
is set disabled independently from the internal clock (asynchronous switch-off path),
whatever the state of the DIR and PWM inputs. All the data stored in SPI registers are not
reset and SPI communication with the MCU is still possible.
The “real-time” state of the bridge is a bit called "BRIDGE_EN". It reflects the disabling of
the bridge, (including disabling by internal protection schemes), and not the tri-state linked
to VVL mode activation.
Note:
In case of IN1/IN2 mode, a rising edge either on IN1 or on IN2 is valid to release the disable
mode. A minimum delay of 1us is suggested to be applied between DIS fall edge and rising
edge on driving control pins.
IN1 IN2 MODE
N DIS
DIS
PWM (IN1)
DIR (IN2)
HS Free
Wheeling
LS Free
Wheeling
HS Free
Wheeling
Reverse
Forward
GAPGPS02322
Table 37. BRIDGE_EN
Bit status
Description
Condition
0
Bridge disabled
Default value
1
Bridge Enabled
-



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