SPSB081 datasheet(49/135 Pages) STMICROELECTRONICS

49 / 135 page

In case the automatically incremented address is not used by the device, undefined data is shifted out. An

automatic address overflow is implemented when address 3FH is reached.

The SPI burst read is limited by the CSN low timeout.

4.3.1.4

SPI data length

The SPI data length value indicates the length of the SCK count monitor, which is running for all accesses to the

device application registers. In case a communication frame with an SCK count is not equal to the reported one, it

leads to a SPI error and the data are rejected.

Table 22. SPI data length

Bit 6

Bit 5

Bit 4

Description

DL2

DL1

DL0

invalid

16-bit SPI

24-bit SPI

32-bit SPI

…

64-bit SPI

4.3.1.4.1

Data consistency check (Parity/CRC)

Table 23. Data consistency check

Bit 1

Bit 0

Description

not used

Parity used

CRC used

Invalid

4.3.1.4.2

Watchdog definition

For further information, see also Section 3.6 Configurable window watchdog.

In case a watchdog is implemented the default settings can be read out via the device information registers.

Table 24. WD Type/Timing

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

WD1

WD0

WT5

WT4

WT3

WT2

WT1

WT0

Watchdog timeout / Long open window WT[5:0] * 5ms

OW2

OW1

OW0

CW2

CW1

CW0

Open window OW[2:0] *5ms

Closed window CW[2:0] *5ms

Invalid

<WD type 1>: 3CH (long open window: 300 ms)

SPSB081

Address definition

DS14048 - Rev 1

page 49/135

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