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STELPD01APUR データシート(PDF) 12 Page - STMicroelectronics

部品番号 STELPD01APUR
部品情報  Electronic load switch for power line
PDF  27 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STELPD01APUR データシート(HTML) 12 Page - STMicroelectronics

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Figure 8. External gate driver circuit
VUP
STELPD01
30 μA
VG
GND
Pull down signal
Pull up block
Pull down block
VOUT
Maximum clamp voltage
6.9
External capacitors and application guidelines
Input and output capacitors are mandatory to guarantee device control loop stability and reduce the transient
effects of stray inductances which may be present on the input and output power paths. In fact, when the
STELPD01 interrupts the current flow, input inductance generates a positive voltage spike on the input, and
output inductance generates a negative voltage spike on the output. To reduce the effects of such transients,
a CIN capacitor of at least 1 μF must be connected between the input pin and GND, and located as close as
possible to the device.
For the same reason, a COUT capacitor of at least 1 μF must be connected at the output port.
When the device is powered by a power line made up of very long wires, where input inductance is higher than 1
μH, the input capacitor should be increased.
It is recommended to provide for additional protections and methods for addressing these transients, such as:
Minimizing inductance of the input and output tracks
TVS diodes on the input to absorb inductive spikes
Schottky diode on the output to absorb negative spikes
Combination of ceramic and electrolytic capacitors on the input and output
STELPD01
External capacitors and application guidelines
DS13254 - Rev 1
page 12/27



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