NCV8189

www.onsemi.com

2

PIN FUNCTION DESCRIPTION

Pin No.

DFNW8

Pin No.

WDFNW6

Pin

Name

Description

1, 2

1

OUT

Regulated output voltage. The output should be bypassed with small 4.7 mF ceramic

capacitor

7, 8

6

IN

Input voltage supply pin

5

4

EN

Chip enable: Applying VEN < 0.4 V disables the regulator, Pulling VEN > 1 V enables the

LDO

6

5

PG

Power Good, open collector. Use 10 kW to 100 kW pull−up resistor connected to output

or input voltage

4

3

GND

Common ground connection

3

2

FB

Adjustable output feedback pin (for adjustable version only)

3

2

SNS

Sense feedback pin. Must be connected to OUT pin on PCB (for fixed versions only)

PAD

PAD

PAD

Expose pad should be tied to ground plane for better power dissipation

ABSOLUTE MAXIMUM RATINGS

Rating

Symbol

Value

Unit

Input Voltage (Note 1)

VIN

*0.3 to 6

V

Output Voltage

VOUT

−0.3 to VIN + 0.3, max. 6

V

Chip Enable Input

VEN

*0.3 to 6

V

Power Good Voltage

VPG

*0.3 to 6

V

Power Good Current

IPG

20

mA

Output Short Circuit Duration

tSC

unlimited

s

Maximum Junction Temperature

TJ

150

°C

Storage Temperature

TSTG

−55 to 150

°C

ESD Capability, Human Body Model (Note 2)

ESDHBM

2000

V

ESD Capability, Charged Device Model (Note 2)

ESDCDM

1000

V

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.

2. This device series incorporates ESD protection and is tested by the following methods:

ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)

ESD Charged Device Model tested per EIA/JESD22−C101, Field Induced Charge Model