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PC33975AR2 データシート(PDF) 8 Page - Freescale Semiconductor, Inc

部品番号 PC33975AR2
部品情報  Multiple Switch Detection Interface with Suppressed Wake-Up and 32mA Wetting Current
PDF  32 Pages
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メーカー  FREESCALE [Freescale Semiconductor, Inc]
ホームページ  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

PC33975AR2 データシート(HTML) 8 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
8
Freescale Semiconductor
33975
STATIC ELECTRICAL CHARACTERISTICS
DIGITAL INTERFACE
Input Logic High-Voltage Thresholds (10)
VIH
0.7 x VDD
–VDD + 0.3
V
Input Logic Low-Voltage Thresholds (10)
VIL
GND - 0.3
–
0.2 x VDD
V
SCLK, SI, Tri-State SO Input Current
0.0 V to VDD
ISCLK, ISI,
ISO(Tri)
-10
–
10
µA
CS
Input Current
CS
= VDD
ICS
-10
–
10
µA
CS
Pull-Up Current
CS
= 0.0 V
ICS
30
–
100
µA
SO High-State Output Voltage
ISO(high) = -200 µA
VSO(high)
VDD - 0.8
–
VDD
V
SO Low-State Output Voltage
ISO(high) = 1.6 mA
VSO(low)
–
–
0.4
V
Input Capacitance on SCLK, SI, Tri-State SO (11)
CIN
–
–
20
pF
INT
Internal Pull-Up Current
–
15
40
100
µA
INT
Voltage
INT
= Open Circuit
VINT(high)
VDD - 0.5
–
VDD
V
INT
Voltage
IINT = 1.0 mA
VINT(low)
–
0.2
0.4
V
WAKE
Internal Pull-Up Current
IWAKE(pu)
20
40
100
µA
WAKE
Voltage
WAKE
= Open Circuit
VWAKE(high)
4.0
4.3
5.3
V
WAKE
Voltage
IWAKE = 1.0 mA
VWAKE(low)
–
0.2
0.4
V
WAKE
Voltage (11)
Maximum Voltage Applied to WAKE Through External Pull-Up
VWAKE(max)
–
–
40
V
Notes
10.
Upper and lower logic threshold voltage levels apply to SI, CS, and SCLK.
11.
This parameter is guaranteed by design however, is not production tested.
Table 4. Static Electrical Characteristics (continued)
Characteristics noted under conditions of 3.0 V ≤ VDD ≤ 5.5 V, 8.0 V ≤ VPWR ≤ 28V, -40°C ≤ TC ≤ 125°C unless otherwise
noted. Where applicable, typical values reflect the parameter’s approximate average value with VPWR = 13 V, TA = 25°C.
Characteristic
Symbol
Min
Typ
Max
Unit



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