Symbol

Parameter

Conditions

Min.

Typ.

Max.

Unit

(Continued)

VCOUT

CVOUT: capacitance of external

capacitor (2)

at 1 MHz

470

-

3300

nF

ESR of external capacitor(1)

0.05

-

0.2

Ω

ESL of external capacitor(1)

-

-

15

nH

Θ JA

FR4 multilayer PCB

TSSOP38

-

80

-

°C/W

TA

Ambient temperature

Pd =100 mW

-40

-

105

°C

1. Internal core power supply voltage.

2. To calculate PDmax (TA), use the formula PDmax = (TJmax - TA)/ΘJA.

3. Care should be taken when the capacitor is selected due to its tolerance, its dependency on temperature, DC bias and

frequency.

Table 7. Operating conditions at power-up/power-down

Symbol

Parameter

Conditions

Min.(1)

Typ.

Max.(1)

Unit

tVDD

VDD rise time rate

2 μs/V

1 s/V(1)

VDD fall time rate

2 μs/V

1 s/V(1)

tTEMP

Reset release delay

VDD rising

3

ms

VIT+

Power-on reset threshold

2.65

2.8

2.98

V

VIT-

Brownout reset threshold

2.58

2.73

2.88

VHYS(BOR)

Brownout reset hysteresis

70

mV

1. Guaranteed by design, not tested in production.

5.3.1

VOUT external capacitor

The stabilization of the main regulator is achieved by connecting an external capacitor CVCOUT to the VCOUT pin.

CVCOUT is specified in Table 6. General operating conditions.

Care should be taken to limit the series inductance to less than 15 nH.

Figure 25. External capacitor CVOUT

5.3.2

Supply current characteristics

The STNRGPFx2 current consumption is declared based on, for example, an application where the application

firmware is loaded and running.

Table 8. Supply current characteristics

Symbol

Parameter

Test condition

Min.

Typ.(1)

Max.(1)

Unit

VDD/VDDA SECTION: current consumption

STNRGPF02, STNRGPF12

Operating conditions

DS12895 - Rev 2

page 25/43