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74VHCT240AFT データシート(PDF) 1 Page - Toshiba Semiconductor

部品番号 74VHCT240AFT
部品情報  CMOS Digital Integrated Circuits Silicon Monolithic
PDF  9 Pages
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メーカー  TOSHIBA [Toshiba Semiconductor]
ホームページ  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

74VHCT240AFT データシート(HTML) 1 Page - Toshiba Semiconductor

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74VHCT240AFT,74VHCT244AFT
1
CMOS Digital Integrated Circuits Silicon Monolithic
74VHCT240AFT,74VHCT244AFT
74VHCT240AFT,74VHCT244AFT
74VHCT240AFT,74VHCT244AFT
74VHCT240AFT,74VHCT244AFT
Start of commercial production
2013-01
1.
1.
1.
1. Functional Description
Functional Description
Functional Description
Functional Description
•
Octal Bus Buffer
74VHCT240AFT: INVERTED, 3-STATE OUTPUTS
74VHCT244AFT: NON-INVERTED, 3-STATE OUTPUTS
2.
2.
2.
2. General
General
General
General
The 74VHCT240AFT and 74VHCT244AFT are advanced high speed CMOS OCTAL BUS BUFFERs fabricated
with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent Bipolar Schottky
TTL while maintaining the CMOS low power dissipation.
The 74VHCT240AFT is an inverting 3-state buffer having two active-low output enables. The 74VHCT244AFT
is a non-inverting 3-state buffer, and has two active-low output enables.
These devices are designed to be used with 3-state memory address drivers, etc.
The input voltage are compatible with TTL output voltage.
These devices may be used as a level converter for interfacing 3.3 V to 5 V system.
Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins
without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and
input/output voltages such as battery back up, hot board insertion, etc.
Note: Output in off-state
3.
3.
3.
3. Features
Features
Features
Features
(1)
AEC-Q100 (Rev. H) (Note 1)
(2)
Wide operating temperature range: Topr = -40 to 125 
(3)
High speed: Propagation delay time = 6.1 ns (typ.) at VCC = 5.0 V
(4)
Quiescent supply current: ICC = 4.0 µA (max) at Ta = 25 
(5)
Compatible with TTL input: VIL = 0.8 V (max)
VIH = 2.0 V (min)
(6)
Power down protection is provided on all inputs and outputs.
(7)
Balanced propagation delays: tPLH
≈ tPHL
(8)
Low noise: VOLP = 1.0 V (max)
(9)
Pin and function compatible with the 74 series
(ACT/HCT/AHCT etc.) 240/244 type.
Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales
representative.
2017-02-23
Rev.4.0
©2017 Toshiba Corporation


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