 2019 Microchip Technology Inc.

DS20006185A-page 14

ATF1504ASV/ATF1504ASVL

TABLE 1-6:

DEDICATED PINOUTS

Dedicated Pin

44-Lead TQFP

44-Lead J-lead

100-Lead TQFP

INPUT/OE2(1)/GCLK2(2)

40

2

90

INPUT/GCLR(3)

39

1

89

INPUT/OE1(1)

38

44

88

INPUT/GCLK1(2)

37

43

87

I/O /GCLK3(2)

35

41

85

I/O / PD (1,2)(4)

5, 19

11, 25

12, 42

I/O / TDI (JTAG)(5)

17

4

I/O / TMS (JTAG)(5)

713

15

I/O / TCK (JTAG)(5)

26

32

62

I/O / TDO (JTAG)(5)

32

38

73

GND(6)

4, 16, 24, 36

10, 22, 30, 42

11, 26, 38, 43, 59, 74, 86, 95

VCC(7)

9, 17, 29, 41

3, 15, 23, 35

3, 18, 34, 39, 51, 66, 82, 91

N/C

—

—

1, 2, 5, 7, 22, 24, 27, 28, 49,

50, 53, 55, 70, 72, 77, 78

# of Signal Pins

36

36

68

# User I/O Pins

32

32

64

Note 1: OE (1, 2)

= Global OE pins

2: GCLK (1, 2, 3)

= Global Clock pins

3: GCLR

= Global Clear pin

4: PD (1, 2)

= Power-Down pins

5: TDI, TMS, TCK. TDO = JTAG pins used for boundary-scan testing or in-system programming

6: GND

= Ground pins

7: VCC

= VCC (VCCINT/VCCIO) pins for the device