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Die Size (Unsawn)

1200 x 1200

47 x 47

µm

mils

Minimum Bond Pad Size

120 x 120

4.72 x 4.72

µm

mils

Die Thickness

350 (±20)

13.78 (±0.79)

µm

mils

Top Metal Composition

Al 1%Si 1.1µm

Back Metal Composition

N/A – Bare Si

Advanced CMOS TTL Input – 74ACT32

Quad 2-Input OR Gate with LSTTL compatible inputs in bare die form

Rev 1.1

08/11/2022



Inputs directly accept TTL



Outputs directly interface CMOS, NMOS and TTL



Outputs Source/Sink 24 mA



Low Input Current: 1µA



Functionally compatible with bipolar 74F32



Lower power alternative to bipolar logic.

Features:

Ordering Information

The following part suffixes apply:



No suffix - MIL-STD-883 /2010B Visual Inspection

For High Reliability versions of this product please see

54ACT32

Supply Formats:

Mechanical Specification



Default – Die in Waffle Pack (400 per tray capacity)



Sawn Wafer on Tape – On request



Unsawn Wafer – On request



Die Thickness <> 350µm(14 Mils) – On request



Assembled into Ceramic Package – On request

The 74ACT32 quad 2-input OR gate is produced on a

1.5µm 5V CMOS process and provides four

independent 2-input OR gates with standard push-pull

outputs. The device gates perform the Boolean function

Y = A ● B or Y = A + B. Device inputs directly accept

LSTTL or CMOS. All inputs are protected against ESD

and excess voltage transients. This device is designed

specifically to interface both Bipolar Logic and High

Speed CMOS systems.

Description

Die Dimensions in µm (mils)

1200 (47)