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MM54HC195N データシート(PDF) 3 Page - National Semiconductor (TI) |
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MM54HC195N データシート(HTML) 3 Page - National Semiconductor (TI) |
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3 / 6 page ![]() AC Electrical Characteristics VCCe5V TAe25 C CLe15 pF tretfe6ns Symbol Parameter Conditions Typ Guaranteed Limit Units fMAX Maximum Operating Frequency 45 30 MHz tPHL tPLH Maximum Propagation Delay Clock to Q 14 24 ns tPHL Maximum Propagation Delay Reset to Q 16 25 ns tREM Minimum Removal Time ShiftLoad to Clock 0 ns tREM Minimum Removal Time Reset Inactive to Clock 5 ns tS Minimum Setup Time (A B C D J K to Clock) 20 ns tS Minimum Setup Time ShiftLoad to Clock 20 ns tW Minimum Pulse Width Clock or Reset 16 ns tH Minimum Hold Time any Input except ShiftLoad 0 ns AC Electrical Characteristics CLe50 pF tretfe6 ns (unless otherwise specified) TAe25 C 74HC 54HC Symbol Parameter Conditions VCC TAeb40 to 85 CTAeb55 to 125 C Units Typ Guaranteed Limits fMAX Maximum Operating 20V 10 6 5 4 MHz Frequency 45V 45 30 24 20 MHz 60V 50 35 28 24 MHz tPHL Maximum Propagation 20V 70 150 189 224 ns Delay Reset to Q or Q 45V 15 30 38 45 ns 60V 12 26 32 38 ns tPHL tPLH Maximum Propagation 20V 70 145 183 216 ns Delay Clock to Q or Q 45V 15 29 37 43 ns 60V 12 25 31 37 ns tTHL tTLH Maximum Output Rise 20V 30 75 95 110 ns and Fall Time 45V 8 15 19 22 ns 60V 7 13 16 19 ns tREM Minimum Removal Time 20V b 20 0 0 ns Shift Load to Clock 45V b 20 0 0 ns 60V b 20 0 0 ns tREM Minimum Removal Time 20V 5 5 5 ns Reset Inactive to Clock 45V 5 5 5 ns 60V 5 5 5 ns tS Minimum Setup Time 20V 100 125 150 ns (A B C D J K to Clock) 45V 20 25 30 ns 60V 17 21 25 ns tS Minimum Setup Time 20V 100 125 150 ns ShiftLoad to Clock 45V 20 25 30 ns 60V 17 21 25 ns tH Minimum Hold Time 20V b 10 0 0 0 ns any Input except ShiftLoad 45V b 20 0 0 ns 60V b 20 0 0 ns tW Minimum Pulse Width 20V 30 80 100 120 ns Clock or Reset 45V 10 16 20 24 ns 60V 9 14 18 20 ns tr tf Maximum Input Rise 20V 1000 1000 1000 ns and Fall Time 45V 500 500 500 ns 60V 400 400 400 ns CPD Power Dissipation 100 pF Capacitance (Note 5) CIN Maximum Input Capacitance 5 10 10 10 pF Note 5 CPD determines the no load dynamic power consumption PDeCPD VCC2 faICC VCC and the no load dynamic current consumption ISeCPD VCC faICC 3 |
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