74HC4060PW datasheet(4/12 Pages) PHILIPS

4 / 12 page

December 1990

Philips Semiconductors

Product speciﬁcation

14-stage binary ripple counter with oscillator

74HC/HCT4060

DYNAMIC POWER DISSIPATION FOR 74HC

Note

1. GND = 0 V; Tamb =25 °C

DYNAMIC POWER DISSIPATION FOR 74HCT

Notes

1. GND = 0 V; Tamb =25 °C

2. Where: fo

= output frequency in MHz

fosc = oscillator frequency in MHz

∑ (CL × VCC2 × fo) = sum of outputs

CL = output load capacitance in pF

= timing capacitance in pF

VCC = supply voltage in V

APPLICATIONS

• Control counters

• Timers

• Frequency dividers

• Time-delay circuits

PARAMETER

VCC (V) TYPICAL FORMULA FOR PD (µW) (note 1)

total dynamic power

dissipation when using the

on-chip oscillator (PD)

2.0

4.5

6.0

CPD × fosc × VCC2 +∑ (CL × VCC2 × fo) + 2Ct × VCC2 × fosc +

× VCC

CPD × fosc × VCC2 +∑ (CL × VCC2 × fo) + 2Ct × VCC2 × fosc + 1 750 × VCC

CPD × fosc × VCC2 +∑ (CL × VCC2 × fo) + 2Ct × VCC2 × fosc + 3 800 × VCC

PARAMETER

VCC (V)

TYPICAL FORMULA FOR PD (µW) (note 1)

total dynamic power

dissipation when using the

on-chip oscillator (PD)

4.5

CPD × fosc × VCC2 +∑ (CL × VCC2 × fo) + 2Ct × VCC2 × fosc + 1 750 × VCC

Fig.4 Functional diagram.

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