 |
データシートサーチシステム |
|
|
データシートサーチシステム |
|
74LVC169D データシート(PDF) 8 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
74LVC169D データシート(HTML) 8 Page - NXP Semiconductors |
|
|
8 / 14 page  Philips Semiconductors Product specification 74LVC169 Presettable synchronous 4-bit up/down binary counter 1998 May 20 8 AC CHARACTERISTICS GND = 0 V; tr = tf v 2.5 ns; CL = 50 pF; RL = 500W; Tamb = –40_C to +85_C LIMITS LIMITS SYMBOL PARAMETER WAVEFORM VCC = 3.3V ±0.3V VCC = 2.7V VCC = 1.2V UNIT MIN. TYP1 MAX. MIN. MAX. TYP tPHL/tPLH propagation delay CP to Qn 1 - 5.0 8.5 - 9.5 24 ns tPHL/tPLH propagation delay CP to TC 1 - 6.5 10.8 - 12.8 30 ns tPHL/tPLH propagation delay CET to TC 2 - 5.3 8.7 - 9.7 19 ns tPHL/tPLH propagation delay U/D to TC 4 - 5.7 9.5 - 10.5 24 ns tW clock pulse width HIGH or LOW 1 4.0 1.2 - 5.0 - - ns tsu set-up time Dn to CP 3 2.5 1.0 - 3.0 - - ns tsu set-up time PE to CP 3 3.0 1.2 - 3.5 - - ns tsu set-up time U/D to CP 5 5.5 2.8 - 6.5 - - ns tsu set-up time CEP, CET to CP 5 4.5 2.1 - 5.5 - - ns th hold time Dn, PE, CEP, CET, U/D to CP 3 and 5 0 *2.5 - 0 - - ns fmax maximum clock pulse frequency 1 125 200 - 110 - - MHz NOTE: 1. These typical values are measured at VCC = 3.3V and Tamb = 25°C. |
|
|
リンク URL |
| ALLDATASHEETはお客様のビジネスに役立ちますか？ [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | データシートへのリンク | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Japanese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
