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STM32U535NET3QTR データシート(PDF) 210 Page - STMicroelectronics

部品番号 STM32U535NET3QTR
部品情報  Ultra-low-power Arm® Cortex®-M33 MCUTrustZone®FPU,240 DMIPS, up to 512 KB flash memory, 274 KB SRAM
PDF  278 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32U535NET3QTR データシート(HTML) 210 Page - STMicroelectronics

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Electrical characteristics
STM32U535xx
210/278
DS14217 Rev 1
Figure 35. Output AC characteristics definition
5.3.15
NRST pin characteristics
The NRST pin input driver uses the CMOS technology. It is connected to a permanent
pull-up resistor, RPU.
Unless otherwise specified, the parameters given in the table below are derived from tests
performed under the ambient temperature and supply voltage conditions summarized
in Table 32.
Maximum frequency is achieved with a duty cycle at (45 - 55%) when loaded by the
specified capacitance.
T
10%
50%
90%
10%
50%
90%
r(IO)out
t
f(IO)out
t
Table 98. NRST pin characteristics(1)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL(NRST)
NRST input low-level voltage
-
-
-
0.3 x VDDIOx
V
VIH(NRST)
NRST input high-level voltage
-
0.7 x VDDIOx
--
Vhys(NRST)
NRST Schmitt trigger voltage
hysteresis
-
-
200
-
mV
RPU
Weak pull-up equivalent resistor(2)
VIN = VSS
30
40
50
kΩ
tF(NRST)
NRST input filtered pulse
-
-
-
50
ns
tNF(NRST)
NRST input not-filtered pulse
1.71 V ≤ VDD ≤ 3.6 V
330
-
-
1.58 V ≤ VDD ≤ 3.6 V
1000
-
-
1.
Specified by design. Not tested in production.
2. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series
resistance is minimal (~10% order)
.



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