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STM32U535NET3QTR データシート(PDF) 211 Page - STMicroelectronics

部品番号 STM32U535NET3QTR
部品情報  Ultra-low-power Arm® Cortex®-M33 MCUTrustZone®FPU,240 DMIPS, up to 512 KB flash memory, 274 KB SRAM
PDF  278 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32U535NET3QTR データシート(HTML) 211 Page - STMicroelectronics

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DS14217 Rev 1
211/278
STM32U535xx
Electrical characteristics
253
Figure 36. Recommended NRST pin protection
1. The reset network protects the device against parasitic resets.
2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in the above table.
Otherwise the reset is not taken into account by the device.
3. The external capacitor on NRST must be placed as close as possible to the device.
5.3.16
Extended interrupt and event controller input (EXTI) characteristics
The pulse on the interrupt input must have a minimal length in order to guarantee that it is
detected by the event controller.
5.3.17
Analog switches booster
MS19878V3
RPU
VDD
Internal reset
External
reset circuit
(1)
NRST
(2)
Filter
0.1 μF
Table 99. EXTI input characteristics(1)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
PLEC
Pulse length to event controller
-
20
-
-
ns
1. Specified by design. Not tested in production.
Table 100. Analog switches booster characteristics(1)
Symbol
Parameter
Min
Typ
Max
Unit
VDD
Supply voltage
1.6
1.8
3.6
V
tSU(BOOST)
Booster startup time
-
-
50
µs
IDD(BOOST)
Booster consumption
-
-
125
µA
1. Specified by design. Not tested in production.



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