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VL53L8CXV0GC/1 データシート(PDF) 7 Page - STMicroelectronics |
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VL53L8CXV0GC/1 データシート(HTML) 7 Page - STMicroelectronics |
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7 / 42 page ![]() 1.6 Application schematics Figure 5. Typical application schematic for I²C shows the application schematic of the VL53L8CX in I²C protocol configuration. Figure 5. Typical application schematic for I²C Note: Capacitors on the external supplies (AVDD, CORE_1V8, and IOVDD) should be placed as close as possible to the module pins. Note: IOVDD must be set to ensure the host and the VL53L8CX operate at the same voltage levels for direct interfacing. Figure 6. Typical application schematic for SPI shows the application schematic of the VL53L8CX in SPI protocol configuration. VL53L8CX Application schematics DS14161 - Rev 2 page 7/42 |
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