REVISION B 12/19/14

85320 DATA SHEET

9

LVCMOS/LVTTL-TO-DIFFERENTIAL

3.3V, 2.5V LVPECL TRANSLATOR

R1

50

(U1-8)

R4

133

R6

133

Optional Termination

R2

50

Clk_in

R7

82.5

Zo = 50 Ohm

C2

0.1uF

R3

50

R5

82.5

C1

10uf

Zo = 50 Ohm

VCC = 3.3V

Zo = 50 Ohm

Zo = 50 Ohm

VCC

VCC = 3.3V

+

-

U1

85320

1

2

3

4

8

7

6

5

nc

Q

nQ

nc

Vcc

Clk

nc

Vee

APPLICATION SCHEMATIC EXAMPLE

Figure 3 shows an example of 85320I application schematic. In

this example, the device is operated at V

CC

=3.3V. The decoupling

capacitor should be located as close as possible to the power pin.

For LVPECL output termination, only two terminations examples are

FIGURE 3. 85320I APPLICATION SCHEMATIC EXAMPLE

shown in this schematic. For more termination approaches, please

refer to the LVPECL Termination Application Note.