HIP6020A

FN4735 Rev 2.00

Page 9 of 16

September 2001

Resistors (ROCSET1 and ROCSET2) program the over-current trip

levels for each PWM converter. As shown in Figure 6, the internal

200

A current sink (IOCSET) develops a voltage across ROCSET

(VSET) that is referenced to VIN. The DRIVE signal enables the

over-current comparator (OVER-CURRENT1 or OVER-

CURRENT2). When the voltage across the upper MOSFET

(VDS(ON)) exceeds VSET, the over-current comparator trips to set

the over-current latch. Both VSET and VDS are referenced to VIN

and a small capacitor across ROCSET helps VOCSET track the

variations of VIN due to MOSFET switching. The over-current

function will trip at a peak inductor current (IPEAK) determined by:

The OC trip point varies with MOSFET’s rDS(ON) temperature

variations. To avoid over-current tripping in the normal

operating load range, determine the ROCSET resistor value

from the equation above with:

1. The maximum rDS(ON) at the highest junction temperature

2. The minimum IOCSET from the specification table

3. Determine IPEAK for IPEAK > IOUT(MAX) + (I)/2,

where

I is the output inductor ripple current.

For an equation for the ripple current see the section under

component guidelines titled ‘Output Inductor Selection’.

OUT1 Voltage Program

The output voltage of the PWM1 converter is programmed to

discrete levels between 1.3VDC and 3.5VDC. This output

(OUT1) is designed to supply the core voltage of Intel’s

advanced microprocessors. The voltage identification (VID) pins

program an internal voltage reference (DACOUT) with a TTL-

compatible 5-bit digital-to-analog converter (DAC). The level of

DACOUT also sets the PGOOD and OVP thresholds. Table 1

specifies the DACOUT voltage for the different combinations of

connections on the VID pins. The VID pins can be left open for a

logic 1 input, because they are internally pulled up to an internal

voltage of about 5V by a 10

A current source. Changing the VID

inputs during operation is not recommended and could toggle

the PGOOD signal and exercise the over-voltage protection.

FIGURE 6. OVER-CURRENT DETECTION

UGATE

OCSET

PHASE

OVER-

CURRENT

+

-

GATE

CONTROL

VCC

OC

200

A

VDS

iD

VSET

ROCSET

VIN = +5V

OVER-CURRENT TRIP:

IOCSET

+

+

PWM

DRIVE

iD rDS ON





IOCSET ROCSET



>

VDS VSET

>

VPHASE VIN VDS

–

=

VOCSET VIN VSET

–

=

IPEAK =

IOCSET ROCSET



rDS ON



----------------------------------------------------

TABLE 1. OUT1 VOLTAGE PROGRAM

PIN NAME

NOMINAL

DACOUT

VOLTAGE

VID4

VID3

VID2

VID1

VID0

01111

1.30

01110

1.35

01101

1.40

01100

1.45

01011

1.50

01010

1.55

01001

1.60

01000

1.65

00111

1.70

00110

1.75

00101

1.80

00100

1.85

00011

1.90

00010

1.95

00001

2.00

00000

2.05

11111

2.00

11110

2.1

11101

2.2

11100

2.3

11011

2.4

11010

2.5

11001

2.6

11000

2.7

10111

2.8

10110

2.9

10101

3.0

10100

3.1

10011

3.2

10010

3.3

10001

3.4

10000

3.5

NOTE: 0 = connected to GND, 1 = open or connected to 5V through

pull-up resistors