AD7621 datasheet(30/32 Pages) AD

30 / 32 page

AD7612

Rev. 0 | Page 30 of 32

SCIN

SCCLK

WARP

START

TEN

123

BUSY

HW/SW = 0

INVSCLK = 0

CNVST

SCCS

t36

t35

t37

BIPOLAR

IMPULSE

OB/2C

SER/PAR = 1

BIP = 0 OR 1

TEN = 0 OR 1

IMPULSE = 0 OR 1

WARP = 0 OR 1

PD = 0

t33

t34

t31

Figure 45. Serial Configuration Port Timing

MICROPROCESSOR INTERFACING

The AD7612 is ideally suited for traditional dc measurement

applications supporting a microprocessor, and ac signal processing

applications interfacing to a digital signal processor. The AD7612

is designed to interface with a parallel 8-bit or 16-bit wide

interface, or with a general-purpose serial port or I/O ports on a

microcontroller. A variety of external buffers can be used with

the AD7612 to prevent digital noise from coupling into the ADC.

SPI Interface

The AD7612 is compatible with SPI and QSPI digital hosts and

DSPs such as Blackfin® ADSP-BF53x and ADSP-218x/ADSP-219x.

Figure 46 shows an interface diagram between the AD7612 and

the SPI-equipped ADSP-219x. To accommodate the slower speed

of the DSP, the AD7612 acts as a slave device, and data must be

read after conversion. This mode also allows the daisy-chain

feature. The convert command could be initiated in response to

an internal timer interrupt.

The reading process can be initiated in response to the end-of-

conversion signal (BUSY going low) using an interrupt line of

the DSP. The serial peripheral interface (SPI) on the ADSP-219x

is configured for master mode (MSTR) = 1, clock polarity bit

(CPOL) = 0, clock phase bit (CPHA) = 1, and SPI interrupt enable

(TIMOD) = 0 by writing to the SPI control register (SPICLTx).

It should be noted that to meet all timing requirements, the SPI

clock should be limited to 17 Mbps allowing it to read an ADC

result in less than 1 μs. When a higher sampling rate is desired,

use one of the parallel interface modes.

BUSY

SDOUT

SCLK

CNVST

AD76121

PFx

SPIxSEL (PFx)

MISOx

SCKx

PFx OR TFSx

ADSP-219x1

1ADDITIONAL PINS OMITTED FOR CLARITY.

DVDD

SER/PAR

EXT/INT

INVSCLK

Figure 46. Interfacing the AD7612 to SPI Interface

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