ADP3120

Rev. 0 | Page 10 of 16

APPLICATION INFORMATION

SUPPLY CAPACITOR SELECTION

For the supply input (VCC) of the ADP3120, a local bypass

capacitor is recommended to reduce the noise and to supply

some of the peak currents drawn. Use a 4.7 μF, low ESR

capacitor. Multilayer ceramic chip (MLCC) capacitors provide

the best combination of low ESR and small size. Keep the

ceramic capacitor as close as possible to the ADP3120.

BOOTSTRAP CIRCUIT

and a diode, as shown in Figure 1. These components can be

selected after the high-side MOSFET has been chosen. The

bootstrap capacitor must have a voltage rating that can handle

twice the maximum supply voltage. A minimum 50 V rating is

recommended. The capacitor values are determined using the

following equations:

GATE

GATE

BST2

BST1

V

Q

C

C

×

=

+

10

(1)

D

CC

GATE

BST2

BST1

BST1

V

V

V

C

C

C

−

=

+

(2)

where:

5 V to 10 V, 7 V being typical).

is the voltage drop across D1.

D

CC

GATE

BST1

V

V

Q

C

−

×

=10

1

10

BST

GATE

GATE

BST2

C

V

Q

C

−

×

=

For example, an NTD60N02 has a total gate charge of about

should be used.

switch node. It also provides peak current limiting through D1.

needs to handle at least 250 mW due to the peak currents that

flow through it.

A small-signal diode can be used for the bootstrap diode due

to the ample gate drive voltage supplied by VCC. The bootstrap

diode must have a minimum 15 V rating to withstand the

maximum supply voltage. The average forward current can

be estimated by

MAX

GATE

AVG

F

f

Q

I

×

=

)

(

(3)

controller. The peak surge current rating should be calculated

using

BST

D

CC

PEAK

F

R

V

V

I

−

=

)

(

(4)

MOSFET SELECTION

When interfacing the ADP3120 to external MOSFETs, the

designer should consider ways to make a robust design that

minimizes stresses on both the driver and the MOSFETs. These

stresses include exceeding the short-time duration voltage

ratings on the driver pins as well as the external MOSFET.

It is also highly recommended to use the boot-snap circuit to

improve the interaction of the driver with the characteristics of

the MOSFETs. If a simple bootstrap arrangement is used, make

sure to include a proper snubber network on the SW node.

HIGH-SIDE (CONTROL) MOSFETS

A high-side, high speed MOSFET is usually selected to

minimize switching losses (see the ADP3186 or ADP3188

data sheet for Flex-Mode1 controller details). This typically

implies a low gate resistance and low input capacitance/charge

device. Yet, a significant source lead inductance can also exist.

This depends mainly on the MOSFET package; it is best to

contact the MOSFET vendor for this information.

The ADP3120 DRVH output impedance and the input resistance

of the MOSFETs determine the rate of charge delivery to the

internal capacitance of the gate. This determines the speed at

which the MOSFETs turn on and off. However, because of

potentially large currents flowing in the MOSFETs at the on and

off times (this current is usually larger at turn off due to ramping

up of the output current in the output inductor), the source lead

inductance generates a significant voltage when the high-side

MOSFETs switch off. This creates a significant drain-source

voltage spike across the internal die of the MOSFETs and can

lead to a catastrophic avalanche. The mechanisms involved in

this avalanche condition can be referenced in literature from the

MOSFET suppliers.