HC908AS60AD/D

Addendum to MC68HC908AS60 Technical Data

Page 402

Change the CHxMAX bit description.

From:

CHxMAX — Channel x Maximum Duty Cycle Bit

When the TOVx bit is at logic 0, setting the CHxMAX bit forces the

duty cycle of buffered and unbuffered PWM signals to 100 percent. As

Figure 22-8 shows, the CHxMAX bit takes effect in the cycle after it

is set or cleared. The output stays at the 100 percent duty cycle level

until the cycle after CHxMAX is cleared.

To:

CHxMAX — Channel x Maximum Duty Cycle Bit

When the TOVx bit is at logic 1 and clear output on compare is

selected, setting the CHxMAX bit forces the duty cycle of buffered and

unbuffered PWM signals to 100 percent. As Figure 22-8 shows, the

CHxMAX bit takes effect in the cycle after it is set or cleared. The

output stays at 100 percent duty cycle level until the cycle after

CHxMAX is cleared.

NOTE:

The PWM 0 percent duty cycle is defined as output low all of the time.

To generate the 0 percent duty cycle, select clear output on compare

and then clear the TOVx bit (CHxMAX = 0). The PWM 100 percent duty

cycle is defined as output high all of the time. To generate the 100

percent duty cycle, use the CHxMAX bit in the TSCx register.

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