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74823CTSOG データシート(PDF) 5 Page - Renesas Technology Corp

部品番号 74823CTSOG
部品情報  HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTER
PDF  8 Pages
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メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

74823CTSOG データシート(HTML) 5 Page - Renesas Technology Corp

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INDUSTRIALTEMPERATURERANGE
IDT74FCT823AT/CT
HIGH-PERFORMANCECMOSBUSINTERFACEREGISTER
5
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT823AT
FCT823CT
Symbol
Parameter
Condition(1)
Min.(2)
Max.
Min.(2)
Max.
Unit
tPLH
PropagationDelay
CL = 50pF
1.5
10
1.5
6
ns
tPHL
CP to Yx (
OE = LOW)
RL = 500
Ω
CL = 300pF(4)
1.5
20
1.5
12.5
ns
RL = 500
Ω
tSU
Set-up Time HIGH or LOW Dx to CP
CL = 50pF
4
—
3
—
ns
tH
Hold Time HIGH or LOW Dx to CP
RL = 500
Ω
2
—
1.5
—
ns
tSU
Set-up Time HIGH or LOW
EN to CP
4
—
3
—
ns
tH
Hold Time HIGH or LOW
EN to CP
2
—
0
—
ns
tPHL
Propagation Delay,
CLR to Yx
1.5
14
1.5
8
ns
tREM
Recovery Time
CLR to CP
6
—
6
—
ns
tW
Clock Pulse Width HIGH or LOW
7
—
6
—
ns
tW
CLR Pulse Width LOW
6
—
6
—
ns
tPZH
Output Enable Time
OE to Yx
CL = 50pF
1.5
12
1.5
7
ns
tPZL
RL = 500
Ω
CL = 300pF(4)
1.5
23
1.5
12.5
ns
RL = 500
Ω
tPHZ
Output Disable Time
OE to Yx
CL = 5pF(4)
1.5
7
1.5
6
ns
tPLZ
RL = 500
Ω
CL = 50pF
1.5
8
1.5
6.5
ns
RL = 500
Ω
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
4. This condition is guaranteed but not tested.



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