74V2T07 datasheet(1/7 Pages) STMICROELECTRONICS

部品番号	74V2T07

部品情報	TRIPLE BUFFER (OPEN DRAIN)

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メーカー	STMICROELECTRONICS [STMicroelectronics]

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1/7

June 2003

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HIGH SPEED: tPD = 4.3ns (TYP.) at VCC =5V

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LOW POWER DISSIPATION:

ICC =1µA(MAX.) at TA =25°C

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COMPATIBLE WITH TTL OUTPUTS:

VIH =2V (MIN), VIL =0.8V (MAX)

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POWER DOWN PROTECTION ON INPUT

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OPERATING VOLTAGE RANGE:

VCC(OPR) = 4.5V to 5.5V

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IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The 74V2T07 is an advanced high-speed CMOS

TRIPLE BUFFER (OPEN DRAIN) fabricated with

sub-micron silicon gate and double-layer metal

wiring C2MOS technology.

The internal circuit is composed of 2 stages

including buffer output, which provide high noise

immunity and stable output.

Power down protection is provided on input and 0

to 7V can be accepted on input with no regard to

the supply voltage. This device can be used to

interface5V to3V.

74V2T07

TRIPLE BUFFER (OPEN DRAIN)

PIN CONNECTION AND IEC LOGIC SYMBOLS

ORDER CODES

PACKAGE

T & R

SOT23-8L

74V2T07STR

SOT23-8L

同様の部品番号 - 74V2T07

メーカー	部品番号	データシート	部品情報
STMicroelectronics	74V2T00	125Kb / 7P	DUAL 2-INPUT NAND GATE 2003-Jun
	74V2T00STR	125Kb / 7P	DUAL 2-INPUT NAND GATE 2003-Jun
	74V2T02	128Kb / 7P	DUAL 2-INPUT NOR GATE Jun-2003
	74V2T02STR	128Kb / 7P	DUAL 2-INPUT NOR GATE Jun-2003
	74V2T03	128Kb / 7P	DUAL 2-INPUT OPEN DRAIN NAND GATE Jun-2003

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