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STR750F データシート(PDF) 34 Page - STMicroelectronics

部品番号 STR750F
部品情報  ARM7TDMI-S, 32-bit MCU with Flash, SMI, 3 std 16-bit timers PWM timer, fast 10-bit ADC, I2C, UART, SSP, USB and CAN
PDF  73 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STR750F データシート(HTML) 34 Page - STMicroelectronics

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Electrical parameters
STR750F
34/71
3.3.3
Embedded voltage regulators
Subject to general operating conditions for VDD_IO, and TA
Table 11.
Embedded voltage regulators
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VMVREG
MVREG power supply(1)
1.
VMVREG is observed on the V18, V18REG and V18BKP pins except in the following case:
- In STOP mode with MVREG OFF (LP_PARAM13 bit). See note 2.
- In STANDBY mode. See note 2.
load <150 mA
1.65
1.80
1.95
V
VLPVREG
LPVREG power supply(2)
2.
In STANDBY mode, VLPVREG is observed on the V18BKP pin
In STOP mode, VLPVREG is observed on the V18, V18REG and V18BKP pins.
load <10 mA
1.30
1.40
1.50
V
tVREG_PWRUP
(1)
Voltage Regulators start-up
time (to reach 90% of final V18
value) at VDD_IO power-up
(3)
3.
Once VDD_IO has reached 3.0 V, the RSM (Regulator Startup Monitor) generates an internal RESET
during this start-up time.
VDD_IO rise
slope = 20 µs/V
80
µs
VDD_IO rise
slope = 20 ms/V
35
ms



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