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SY88843VMG データシート(PDF) 5 Page - Micrel Semiconductor

部品番号 SY88843VMG
部品情報  3.3V/5V 3.2Gbps CML LOW-POWER LIMITING POST AMPLIFIER w/TTL SD
PDF  11 Pages
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メーカー  MICREL [Micrel Semiconductor]
ホームページ  http://www.micrel.com
Logo MICREL - Micrel Semiconductor

SY88843VMG データシート(HTML) 5 Page - Micrel Semiconductor

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SY88843V
Micrel, Inc.
M9999-110905
hbwhelp@micrel.com or (408) 955-1690
V
CC = 3.0V to 3.6V or 4.5V to 5.5V, TA = –40°C to +85°C, RLOAD = 50Ω to VCC; typical values at VCC = 3.3V, TA = 25°C.
Symbol
Parameter
Condition
Min
Typ
Max
Units
PSRR
Power Supply Rejection Ratio
35
dB
t
r,tf
Output Rise/Fall Time
Note 7
60
120
ps
(20% to 80%)
t
JITTER
Deterministic
Note 8
15
psPP
Random
5psRMS
V
ID
Differential Input Voltage Swing
10
1800
mVPP
V
OD
Differential Output Voltage Swing
3.3V, Note 7
700
800
950
mVPP
5V, Note 7
700
800
1020
mVPP
HYS
SD Hysteresis
Note 9
2
4.6
8
dB
t
OFF
SD Release Time
0.1
0.5
µs
t
ON
SD Assert Time
0.2
0.5
µs
V
SR
SD Sensitivity Range
Note 10
10
35
mVPP
B
–3dB
–3dB Bandwidth
2.0
GHz
A
V(Diff)
Differential Voltage Gain
32
38
dB
S
21
Single-Ended Small-Signal Gain
26
32
dB
Notes:
7. Amplifier in limiting mode. Input is a 200MHz square wave, t
r < 300ps.
8. Deterministic jitter measured using 2.488Gbps K28.5 pattern, V
ID = 10mVpp. Random jitter measured using 2.488Gbps K28.7 pattern, VID = 10mVpp.
9. Electrical signal.
10. This is the detectable range of input amplitudes that can de-assert SD. The input amplitude to assert SD is 2–8dB higher than the de-assert
amplitude. See “Typical Operating Characteristics” for graphs showing how to choose a particular V
SDLVL or RSDLVL for a particular SD de-assert,
and its associated assert, amplitude. If increased SD sensitivity and hysteresis are required, an application note entitled “Notes on Sensitivity and
Hysteresis in Micrel Post Amplifiers” is available at http://www.micrel.com/product-info/app_hints+notes.shtml.
AC ELECTRICAL CHARACTERISTICS



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