AM29BL802C datasheet(8/46 Pages) SPANSION

8 / 46 page

Am29BL802C

22371C7 November 3, 2006

D A TA

SH EET

PIN CONFIGURATION

A0–A18

19 addresses

DQ0–DQ15 =

16 data inputs/outputs

CE#

Chip Enable Input. This signal shall be

asynchronous relative to CLK for the

burst mode.

OE#

Output Enable Input. This signal shall

be asynchronous relative to CLK for

the burst mode.

WE#

Write enable. This signal shall be

asynchronous relative to CLK for the

burst mode.

VSS

Device ground

No connect. Pin not connected

internally

RY/BY#

Ready Busy output

CLK

Clock Input that can be tied to the

system or microprocessor clock and

provides the fundamental timing and

internal operating frequency. CLK

latches input addresses in conjunction

with LBA# input and increments the

burst address with the BAA# input.

LBA#

Load Burst Address input. Indicates

that the valid address is present on the

address inputs.

LBA# Low at the rising edge of the

clock latches the address on the

address inputs into the burst mode

Flash device. Data becomes available

tPACC ns of initial access time after the

rising edge of the same clock that

latches the address.

LBA# High indicates that the address

is not valid

BAA#

Burst Address Advance input.

Increments the address during the

burst mode operation

BAA# Low enables the burst mode

Flash device to read from the next

word when gated with the rising edge

of the clock. Data becomes available

tBACC ns of burst access time after the

rising edge of the clock

BAA # High prevents the rising edge of

the clock from advancing the data to

the next word output. The output data

remains unchanged.

IND#

Highest burst counter address

reached. IND# is low at the end of a

32-word burst sequence (when word

Da + 31 is output). The output will

wrap around to Da on the next CLK

cycle (with BAA# low).

RESET#

Hardware reset input

Note: The address, data, and control signals (RY/BY#, LBA,

BAA, IND, RESET, OE#, CE#, and WE#) are 5 V tolerant.

LOGIC SYMBOL

DQ0–DQ15

A0–A18

CE#

OE#

WE#

RESET#

CLK

RY/BY#

IND#

LBA#

BAA#

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