ADL5519ACPZ-R2 datasheet(19/27 Pages) AD

19 / 27 page

Preliminary Technical Data

ADL5519

Rev. PrB | Page 19 of 27

increase until the power on the two input channels is equal,

resulting in a signal chain gain of unity.

If a gain other than 0 dB is required, an attenuator can be used

in one of the RF paths, as shown in Figure 21. Alternatively,

power splitters or directional couplers of different coupling

factors can be used. Another convenient option is to apply a

voltage on VLVL other than OUTA. Refer to Equation 11 and

the Controller Mode section for more detail.

If the VGA/VVA has a positive gain control sense, the OUTN

output of the difference amplifier can be used with the

integrating capacitor tied back to FBKB.

The choice of the integrating capacitor affects the response time

of the AGC loop. Small values give a faster response time but

can result in instability, whereas larger values reduce the response

time. Note that in this mode, the capacitors on CLPA and CLPB,

which perform the rms averaging function, must still be used

and also affect the loop response time.

CHANNEL A

Log Detector

CHANNEL B

Log Detector

CLPB

CLPA

VLVL

INHB

INLB

INLA

INHA

VSTA

VSTB

OUTB

FBKB

OUTN

OUTP

FBKA

OUTA

ADL5519

CINT

DIFF OUT +

0.1

μF

0.1

μF

ATTENUATOR

VGA/VVA

DIRECTIONAL

POWER SPLITTER

DIRECTIONAL

POWER SPLITTER

0.1

μF

0.1

μF

Figure 21. Operation in Controller Mode for Automatic Gain Control

ADL5519ACPZ-R2 データシート(PDF) 19 Page - Analog Devices

ADL5519ACPZ-R2 データシート(HTML) 19 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27

データシートダウンロード