Nexperia

74LVC16373A; 74LVCH16373A

16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

-40 °C to +85 °C

-40 °C to +125 °C

Symbol Parameter

Conditions

Min

Typ [1]

Max

Min

Max

Unit

OE to Qn; see Fig. 8

[2]

VCC = 1.2 V

-

11

-

-

-

ns

VCC = 1.65 V to 1.95 V

2.8

4.5

9.1

2.8

10.5

ns

VCC = 2.3 V to 2.7 V

1.0

2.5

5.1

1.0

6.0

ns

VCC = 2.7 V

1.5

3.3

6.3

1.5

8.0

ns

tdis

disable time

VCC = 3.0 V to 3.6 V

1.5

3.1

5.4

1.5

7.0

ns

LE HIGH; see Fig. 7

VCC = 1.65 V to 1.95 V

5.0

-

-

5.0

-

ns

VCC = 2.3 V to 2.7 V

4.0

-

-

4.0

-

ns

VCC = 2.7 V

3.0

-

-

3.0

-

ns

tW

pulse width

VCC = 3.0 V to 3.6 V

3.0

2.0

-

3.0

-

ns

Dn to LE; see Fig. 9

VCC = 1.65 V to 1.95 V

3.0

-

-

3.0

-

ns

VCC = 2.3 V to 2.7 V

2.5

-

-

2.5

-

ns

VCC = 2.7 V

2.0

-

-

2.0

-

ns

tsu

set-up time

VCC = 3.0 V to 3.6 V

2.0

1.0

-

2.0

-

ns

Dn to LE; see Fig. 9

VCC = 1.65 V to 1.95 V

2.5

-

-

2.5

-

ns

VCC = 2.3 V to 2.7 V

2.0

-

-

2.0

-

ns

VCC = 2.7 V

0.9

-

-

0.9

-

ns

th

hold time

VCC = 3.0 V to 3.6 V

+0.9

-1.0

-

+0.9

-

ns

tsk(o)

output skew time

VCC = 3.0 V to 3.6 V

[3]

-

-

1.0

-

1.5

ns

per input; VI = GND to VCC

[4]

VCC = 1.65 V to 1.95 V

-

10.8

-

-

-

pF

VCC = 2.3 V to 2.7 V

-

13.0

-

-

-

pF

CPD

power dissipation

capacitance

VCC = 3.0 V to 3.6 V

-

15.0

-

-

-

pF

[1] Typical values are measured at Tamb = 25 °C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively.

[2] tpd is the same as tPLH and tPHL.

ten is the same as tPZL and tPZH.

tdis is the same as tPLZ and tPHZ.

[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.

[4] CPD is used to determine the dynamic power dissipation (PD in μW).

PD = CPD × VCC 2 × fi × N + Σ(CL × VCC 2 × fo) where:

fi = input frequency in MHz; fo = output frequency in MHz

CL = output load capacitance in pF

VCC = supply voltage in Volts

N = number of inputs switching

Σ(CL × VCC 2 × fo) = sum of the outputs

74LVC_LVCH16373A

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© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 10 — 1 October 2021

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