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MC68340 データシート(PDF) 162 Page - Freescale Semiconductor, Inc

部品番号 MC68340
部品情報  Integrated Processor with DMA User?셲 Manual
PDF  441 Pages
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メーカー  FREESCALE [Freescale Semiconductor, Inc]
ホームページ  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC68340 データシート(HTML) 162 Page - Freescale Semiconductor, Inc

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MOTOROLA
MC68340 USER’S MANUAL
5- 25
Table 5-7. Shift and Rotate Operations
Instruction
Operand
Syntax
Operand Size
Operation
ASL
Dn, Dn
#
〈data〉, Dn
〈ea〉
8, 16, 32
8, 16, 32
16
X/C
0
ASR
Dn, Dn
#
〈data〉, Dn
〈ea〉
8, 16, 32
8, 16, 32
16
X/C
LSL
Dn, Dn
#
〈data〉, Dn
〈ea〉
8, 16, 32
8, 16, 32
16
X/C
0
LSR
Dn, Dn
#
〈data〉, Dn
〈ea〉
8, 16, 32
8, 16, 32
16
X/C
0
ROL
Dn, Dn
#
〈data〉, Dn
〈ea〉
8, 16, 32
8, 16, 32
16
C
ROR
Dn, Dn
#
〈data〉, Dn
〈ea〉
8, 16, 32
8, 16, 32
16
C
ROXL
Dn, Dn
#
〈data〉, Dn
〈ea〉
8, 16, 32
8, 16, 32
16
X
C
ROXR
Dn, Dn
#
〈data〉, Dn
〈ea〉
8, 16, 32
8, 16, 32
16
X
C
SWAP
Dn
16
MSW
LSW
5.3.3.6 BIT MANIPULATION INSTRUCTIONS. Bit manipulation operations are
accomplished using the following instructions: bit test (BTST), bit test and set (BSET), bit
test and clear (BCLR), and bit test and change (BCHG). All bit manipulation operations
can be performed on either registers or memory. The bit number is specified as immediate
data or in a data register. Register operands are 32 bits long, and memory operands are 8
bits long. Table 5-8 is a summary of bit manipulation instructions.
Table 5-8. Bit Manipulation Operations
Instruction
Operand
Syntax
Operand Size
Operation
BCHG
Dn,
〈ea〉
#
〈data〉, 〈ea〉
8, 32
8, 32
~(
〈bit number〉 of destination) ⇒ Z ⇒ bit of
destination
BCLR
Dn,
〈ea〉
#
〈data〉, 〈ea〉
8, 32
8, 32
~(
〈bit number〉 of destination) ⇒ Z; 0 ⇒ bit of
destination
BSET
Dn,
〈ea〉
#
〈data〉, 〈ea〉
8, 32
8, 32
~(
〈bit number〉 of destination) ⇒ Z; 1 ⇒ bit of
destination
BTST
Dn,
〈ea〉
#
〈data〉, 〈ea〉
8, 32
8, 32
~
(〈bit number〉 of destination) ⇒ Z
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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