 |
データシートサーチシステム |
|
|
データシートサーチシステム |
|
ADT7408CCPZ-R2 データシート(PDF) 4 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADT7408CCPZ-R2 データシート(HTML) 4 Page - Analog Devices |
|
|
4 / 24 page  ADT7408 Rev. 0 | Page 4 of 24 TIMING CHARACTERISTICS TA = −20°C to +125°C, VDD = 3.0 V to 3.6 V, unless otherwise noted. Table 2. Parameter1 Symbol Min Typ Max Unit Comments SCL Clock Frequency fSCL 10 100 kHz Bus Free Time Between a Stop (P) and Start (S) Condition tBUF 4.7 μs Hold Time After (Repeated) Start Condition tHD:STA 4.0 μs After this period, the first clock is generated. Repeated Start Condition Setup Time tSU:STA 4.7 μs High Period of the SCL Clock tHIGH 4.0 50 μs Low Period of the SCL Clock tLOW 4.7 μs Fall Time of Both SDA and SCL Signals tF 300 ns Rise Time of Both SDA and SCL Signals tR 1000 ns Data Setup Time tSU:DAT 250 ns Data Hold Time tHD:DAT 300 ns Setup Time for Stop Condition tSU:STO 4.0 μs Capacitive Load for Each Bus Line, CB 400 pF 1 Guaranteed by design and characterization, not production tested. TIMING DIAGRAM SCL SDA PS P VIH S tR tR tF tF tSU:DAT tHIGH tHD:DAT tBUF tLOW tSU:STA tSU:STO tHD:STA VIL VIH VIL Figure 2. SMBus/I2C Timing Diagram |
|
|
リンク URL |
| ALLDATASHEETはお客様のビジネスに役立ちますか？ [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | データシートへのリンク | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Japanese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
