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74LVC2G00GS データシート(PDF) 8 Page - Nexperia B.V. All rights reserved

部品番号 74LVC2G00GS
部品情報  Dual 2-input NAND gate
PDF  20 Pages
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メーカー  NEXPERIA [Nexperia B.V. All rights reserved]
ホームページ  https://www.nexperia.com/
Logo NEXPERIA - Nexperia B.V. All rights reserved

74LVC2G00GS データシート(HTML) 8 Page - Nexperia B.V. All rights reserved

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Nexperia
74LVC2G00
Dual 2-input NAND gate
11.1. Waveforms and test circuit
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nA, nB input
nY output
tPLH
tPHL
GND
VI
VM
VM
VOH
VOL
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 8. Input (nA, nB) to output (nY) propagation delays
Table 9. Measurement points
Supply voltage
Input
Output
VCC
VM
VM
1.65 V to 1.95 V
0.5 × VCC
0.5 × VCC
2.3 V to 2.7 V
0.5 × VCC
0.5 × VCC
2.7 V
1.5 V
1.5 V
3.0 V to 3.6 V
1.5 V
1.5 V
4.5 V to 5.5 V
0.5 × VCC
0.5 × VCC
74LVC2G00
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 16 — 20 June 2022
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