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AD8159ASVZ データシート(PDF) 18 Page - Analog Devices

部品番号 AD8159ASVZ
部品情報  3.2 Gbps Quad Buffer Mux/Demux
PDF  24 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD8159ASVZ データシート(HTML) 18 Page - Analog Devices

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AD8159
Rev. A | Page 18 of 24
APPLICATIONS
The main application of the AD8159 is to support redundancy
on both the backplane side and the line interface side of a serial
link. Each port consists of four lanes to support standards such
as XAUI.
Another application for the AD8159 is test equipment for
evaluating high speed serial I/Os running at data rates at or
lower than 3.2 Gbps. Figure 40 illustrates a possible application
of the AD8159 in a simple XAUI link tester.
Figure 38 illustrates redundancy in an XAUI backplane
system. Each line card is connected to two switch fabrics
(primary and redundant). The device can be configured to
support either 1 + 1 or 1:1 redundancy.
FABRIC CARDS
LINE CARDS
BACKPLANE
AD8159
PHYSICAL
INTERFACE
MACs
FRAMERS
FABRIC INTERFACE
TRAFFIC MANAGERS
NETWORK PROCESSOR
AD8159
PHYSICAL
INTERFACE
MACs
FRAMERS
FABRIC INTERFACE
TRAFFIC MANAGERS
NETWORK PROCESSOR
REDUNDANT
SWITCH
FABRIC
PRIMARY
SWITCH
FABRIC
Figure 38. Using the AD8159 for Switch Redundancy
LINE CARD
MACs
FRAMERS
FABRIC INTERFACE
TRAFFIC MANAGERS
NETWORK PROCESSOR
PRIMARY
MODULE
REDUNDANT
MODULE
Figure 39. Using the AD8159 for Line Interface Redundancy
PORT B
PORT A
PORT C
FPGA
GENERATES SIMPLE
PATTERNS
CONNECTOR
CONNECT TO DEVICE UNDER TEST
TEST CARD
CONNECT TO PROTOCOL
ANALYZER
Figure 40. Using the AD8159 in Test Equipment



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