データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

AD9705BCPZ データシート(PDF) 8 Page - Analog Devices

部品番号 AD9705BCPZ
部品情報  8-/10-/12-/14-Bit, 175 MSPS TxDAC D/A Converters
PDF  52 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD9705BCPZ データシート(HTML) 8 Page - Analog Devices

Back Button AD9705BCPZ Datasheet HTML 4Page - Analog Devices AD9705BCPZ Datasheet HTML 5Page - Analog Devices AD9705BCPZ Datasheet HTML 6Page - Analog Devices AD9705BCPZ Datasheet HTML 7Page - Analog Devices AD9705BCPZ Datasheet HTML 8Page - Analog Devices AD9705BCPZ Datasheet HTML 9Page - Analog Devices AD9705BCPZ Datasheet HTML 10Page - Analog Devices AD9705BCPZ Datasheet HTML 11Page - Analog Devices AD9705BCPZ Datasheet HTML 12Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 52 page
background image
AD9704/AD9705/AD9706/AD9707
Rev. 0 | Page 8 of 52
AD9707
AD9706
AD9705
AD9704
Parameter
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
Supply Current Clock
Power-Down Mode (IDVDD) 4
0.22
0.28
0.22
0.28
0.22
0.28
0.22
0.28
mA
Supply Current Clock
Power-Down Mode (ICLKVDD)4
9.5
16
9.5
16
9.5
16
9.5
16
μA
Power Supply Rejection
Ratio (AVDD)5
−1
−0.1
+1
−1
−0.1
+1
−1
−0.1
+1
−1
−0.1
+1
% of
FSR/V
OPERATING RANGE
−40
+85
−40
+85
−40
+85
−40
+85
°C
1 Measured at IOUTA, driving a virtual ground, at 25
°C only.
2 Nominal full-scale current, IOUTFS, is 32× the IREF current.
3 An external buffer amplifier with input bias current < 100 nA should be used to drive any external load.
4 Measured at fCLOCK = 80 MSPS and fOUT = 1 MHz, using differential clock.
5
±5% power supply variation, IOUTFS = 1 mA, at 25°C only.
DYNAMIC SPECIFICATIONS (1.8 V)
TMIN to TMAX, AVDD = 1.8 V, DVDD = 1.8 V, CLKVDD = 1.8 V, IOUTFS = 1 mA, differential transformer coupled output,
453 Ω differentially terminated,1 unless otherwise noted.
Table 5.
AD9707
AD9706
AD9705
AD9704
Parameter
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
Maximum Output Update Rate
(fCLOCK)
80
80
80
80
MSPS
Output Settling Time (tST) (to 0.1%)2
11
11
11
11
ns
Output Propagation Delay (tPD)
5.6
5.6
5.6
5.6
ns
Glitch Impulse
5
5
5
5
pV-s
Output Rise Time (10% to 90%)2
2.5
2.5
2.5
2.5
ns
Output Fall Time (10% to 90%)2
2.5
2.5
2.5
2.5
ns
AC LINEARITY
Spurious-Free Dynamic Range
to Nyquist
fCLOCK = 10 MSPS; fOUT = 2.1 MHz
86
86
85
70
dBc
fCLOCK = 25 MSPS; fOUT = 2.1 MHz
87
86
84
68
dBc
fCLOCK = 25 MSPS; fOUT = 5.1 MHz
82
82
82
68
dBc
fCLOCK = 65 MSPS; fOUT = 10.1 MHz
82
79
78
70
dBc
fCLOCK = 65 MSPS; fOUT = 15.1 MHz
77
76
74
69
dBc
fCLOCK = 80 MSPS; fOUT = 1.0 MHz
74
82
72
82
72
82
66
70
dBc
fCLOCK = 80 MSPS; fOUT = 15.1 MHz
77
77
77
68
dBc
fCLOCK = 80 MSPS; fOUT = 30.1 MHz
60
59
59
60
dBc
Noise Spectral Density
fCLOCK = 80 MSPS; fOUT = 10 MHz;
IOUTFS = 1 mA
−141.0
−139.4
−135.1
−126.3
dBc/
Hz
ENOB at IOUTFS = 1 mA
10.5
10.2
9.5
8.0
bits
fCLOCK = 80 MSPS; fOUT = 10 MHz;
IOUTFS = 2 mA
−145.7
dBc/
Hz
ENOB at IOUTFS = 2 mA
10.3
Bits
1 See Figure 71 for diagram.
2 Measured single-ended into 500 Ω load.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com