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CS5014-KL14 データシート(PDF) 17 Page - Cirrus Logic |
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CS5014-KL14 データシート(HTML) 17 Page - Cirrus Logic |
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17 / 46 page ![]() To interface with a 16-bit data bus, the BW input to the CS5012A/14/16 should be held high and all data bits (12, 14 and 16 for the CS5012A, CS5014 and CS5016 respectively) read in paral- lel on pin s D4-D15 (CS5012A), D2-D15 (CS5014), or D0-D15 (CS5016). With an 8-bit bus, the converter’s result must be read in two portions. In this instance, BW should be held low and the 8 MSB’s obtained on the first read cycle following a conversion. The second read cycle will yield the remaining LSB’s (4, 6 or 8 for the CS5012A/14/16 respectively) with 4, 2 or 0 trail- ing zeros. Both bytes appear on pins D0-D7. The upper/lower bytes of the same data will continue to toggle on subsequent reads until the next con- version finishes. Status bit S2 indicates which byte will appear on the next data read operation. The CS5012A/14/16 internally buffer their output data, so data can be read while the devices are tracking or converting the next sample. Therefore, retrieving the converters’ digital output requires no reduction in ADC throughput. Enabling the 3- state outputs while the CS5012A/14/16 is converting will not introduce conversion errors. Connecting CMOS logic to the digital outputs is recommended. Suitable logic families include 4000B, 74HC, 74AC, 74ACT, and 74HCT. PIN STATUS BIT STATUS DEFINITION D0 S0 END OF CONVERSION Falls upon completion of a conversion, and returns high on the first subsequent read. D1 S1 RESERVED Reserved for factory use. D2 S2 LOW BYTE/HIGH BYTE When data is to be read in an 8-bit format (BW=0), indicates which byte will appear at the output next. D3 S3 END OF TRACK When low, indicates the input has been acquired to the devices specified accuracy. D4 S4 RESERVED Reserved for factory use. D5 S5 TRACKING High when the device is tracking the input. D6 S6 CONVERTING High when the device is converting the held input. D7 S7 CALIBRATING High when the device is calibrating. Table 2. Status Pin Definitions D7 D0 D5 D3 D2 D1 D6 D4 D12 D11 D10 D9 D8 D15 D14 D13 XX X XX X X X S7 S6 S5 S4 S3 S2 S1 S0 8- or 16-Bit Data Bus Data (A0=1) Status (A0=0) "X" Denotes High Impedance Output XX X XX X XX 8-Bit Bus (BW=0) 16-Bit Bus (BW=1) B5 B4 B11 B10 B7 B6 B8 B9 CS5012A CS5014 CS5016 B13 B11 B9 B7 B6 B12 B10 B8 B5 B4 B11 B10 B7 B6 B8 B9 B15 B13 B11 B9 B8 B14 B12 B10 B3 B2 B1 B0 0 0 00 B5 B4 B3 B2 0 0 B1 B0 B7 B6 B5 B4 B1 B0 B3 B2 B3 B2 B1 B0 0 0 00 XX X XX X XX B7 B6 B13 B12 B9 B8 B10 B11 B5 B4 B3 B2 0 0 B1 B0 XX X XX X XX B9 B8 B15 B14 B11 B10 B12 B13 B7 B6 B5 B4 B1 B0 B3 B2 CS5016 CS5014 CS5012A Figure 7. CS5012A/14/16 Data Format CS5012A, CS5014, CS5016 DS14F6 2-23 |
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