RT8207P datasheet(21/22 Pages) RICHTEK

21 / 22 page

DS8207P-03

September 2016

www.richtek.com

RT8207P

is a registered trademark of Richtek Technology Corporation.

Layout Considerations

Layout is very important in high frequency switching

converter design. If designed improperly, the PCB could

radiate excessive noise and contribute to the converter

instability. Certain points must be considered before

starting a layout for the RT8207P.



Connect an RC low pass filter from VDDP to VDD; 1

μF

and 5.1

Ω are recommended. Place the filter capacitor

close to the IC.



Keep current limit setting network as close as possible

to the IC. Routing of the network should avoid coupling

to high voltage switching node.



Connections from the drivers to the respective gate of

the high side or the low side MOSFET should be as

short as possible to reduce stray inductance.



All sensitive analog traces and components such as

VDDQ, FB, PGND, PGOOD, CS, VDD, and TON should

be placed away from high voltage switching nodes such

as PHASE, LGATE, UGATE, and BOOT to avoid

coupling. Use internal layer(s) as ground plane(s) and

shield the feedback trace from power traces and

components.



VLDOIN should be connected to VDDQ output with short

and wide trace. If different power source is used for

VLDOIN, an input bypass capacitor should be placed as

close as possible to the pin with short and wide trace.



The output capacitor for VTT should be placed close to

the pin with short and wide connection in order to avoid

additional ESR and/or ESL of the trace.



It is strongly recommended to connect VTTSNS to the

positive node of VTT output capacitor(s) as a separate

trace from the high current power line to avoid additional

ESR and/or ESL. If it is needed to sense the voltage of

the point of the load, it is recommended to attach the

output capacitor(s) at that point. It is also recommended

to minimize any additional ESR and/or ESL of ground

trace between the GND pin and the output capacitor(s).



Current sense connections must always be made using

Kelvin connections to ensure an accurate signal, with

the current limit resistor located at the device.



Power sections should connect directly to ground

plane(s) using multiple vias as required for current

handling (including the chip power ground connections).

Power components should be placed as close to the IC

as possible to minimize loops and reduce losses.

Figure 7. Derating Curve of Maximum Power Dissipation

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

255075

100

125

Ambient Temperature (°C)

Four-Layer PCB

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