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CAT24C164 データシート(PDF) 1 Page - Catalyst Semiconductor

部品番号 CAT24C164
部品情報  16-Kb CMOS Serial EEPROM, Cascadable
PDF  16 Pages
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メーカー  CATALYST [Catalyst Semiconductor]
ホームページ  http://www.catalyst-semiconductor.com
Logo CATALYST - Catalyst Semiconductor

CAT24C164 データシート(HTML) 1 Page - Catalyst Semiconductor

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© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Doc. No. 1118, Rev. A
CAT24C164
16-Kb CMOS Serial EEPROM, Cascadable
PIN CONFIGURATION
FUNCTIONAL SYMBOL
FEATURES
Supports Standard and Fast I2C Protocol
1.8 V to 5.5 V Supply Voltage Range
16-Byte Page Write Buffer
Hardware Write Protection for entire memory
Schmitt Triggers and Noise Suppression Filters
on I2C Bus Inputs (SCL and SDA).
Low power CMOS technology
1,000,000 program/erase cycles
100 year data retention
Industrial temperature range
RoHS-compliant 8-lead PDIP, SOIC, TSSOP and
8-pad TDFN packages.
PDIP (L)
SOIC (W)
TSSOP (Y)
TDFN (VP2)
VCC
VSS
SDA
SCL
WP
CAT24C164
A2, A1, A0
DEVICE DESCRIPTION
The CAT24C164 is a 16-Kb CMOS cascadable Serial
EEPROM device organized internally as 128 pages of
16 bytes each, for a total of 2048x8 bits. The device
supports both the Standard (100 kHz) as well as Fast
(400 kHz) I2C protocol.
Data is written by providing a starting address, then
loading 1 to 16 contiguous bytes into a Page Write
Buffer, and then writing all data to non-volatile memory
in one internal write cycle. Data is read by providing a
starting address and then shifting out data serially while
automatically incrementing the internal address count.
External address pins make it possible to address
up to eight CAT24C164 devices on the same bus.
8
7
6
5
VCC
WP
SCL
SDA
A2
A0
A1
VSS
1
2
3
4
For the location of Pin 1, please consult the corresponding package drawing.
PIN FUNCTIONS
A0, A1, A2
Device Address Inputs
SDA
Serial Data Input/Output
SCL
Serial Clock Input
WP
Write Protect Input
VCC
Power Supply
VSS
Ground
* Catalyst carries the I2C protocol under a license from the Philips Corporation.
For Ordering Information details, see page 15.


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