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WM8983GEFL/V データシート(PDF) 3 Page - Wolfson Microelectronics plc |
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WM8983GEFL/V データシート(HTML) 3 Page - Wolfson Microelectronics plc |
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3 / 123 page ![]() Production Data WM8983 w PD Rev 4.0 November 2006 3 TABLE OF CONTENTS DESCRIPTION .......................................................................................................1 FEATURES.............................................................................................................1 APPLICATIONS .....................................................................................................1 BLOCK DIAGRAM .................................................................................................2 TABLE OF CONTENTS .........................................................................................3 PIN CONFIGURATION...........................................................................................5 ORDERING INFORMATION ..................................................................................5 PIN DESCRIPTION ................................................................................................6 ABSOLUTE MAXIMUM RATINGS .........................................................................7 RECOMMENDED OPERATING CONDITIONS .....................................................7 ELECTRICAL CHARACTERISTICS ......................................................................8 TERMINOLOGY .......................................................................................................... 13 SPEAKER OUTPUT THD VERSUS POWER ......................................................14 POWER CONSUMPTION ....................................................................................16 TYPICAL SCENARIOS................................................................................................ 16 AUDIO PATHS OVERVIEW ........................................................................................ 17 SYSTEM CLOCK TIMING ........................................................................................... 18 AUDIO INTERFACE TIMING – MASTER MODE ........................................................ 18 AUDIO INTERFACE TIMING – SLAVE MODE............................................................ 19 CONTROL INTERFACE TIMING – 3-WIRE MODE .................................................... 20 CONTROL INTERFACE TIMING – 2-WIRE MODE .................................................... 21 INTERNAL POWER ON RESET CIRCUIT ..........................................................22 RECOMMENDED POWER UP/DOWN SEQUENCE .................................................. 24 RECOMMENDED L/ROUT1 ENABLE SEQUENCE .................................................... 27 DEVICE DESCRIPTION .......................................................................................28 INTRODUCTION ......................................................................................................... 28 INPUT SIGNAL PATH ................................................................................................. 30 ANALOGUE TO DIGITAL CONVERTER (ADC).......................................................... 39 INPUT LIMITER / AUTOMATIC LEVEL CONTROL (ALC) .......................................... 44 OUTPUT SIGNAL PATH ............................................................................................. 56 3D STEREO ENHANCEMENT .................................................................................... 63 ANALOGUE OUTPUTS............................................................................................... 63 DIGITAL AUDIO INTERFACES................................................................................... 80 AUDIO SAMPLE RATES............................................................................................. 85 MASTER CLOCK AND PHASE LOCKED LOOP (PLL) ............................................... 85 COMPANDING............................................................................................................ 88 GENERAL PURPOSE INPUT/OUTPUT...................................................................... 90 OUTPUT SWITCHING (JACK DETECT)..................................................................... 90 CONTROL INTERFACE.............................................................................................. 92 RESETTING THE CHIP .............................................................................................. 93 POWER SUPPLIES .................................................................................................... 93 POWER MANAGEMENT ............................................................................................ 93 REGISTER MAP...................................................................................................95 REGISTER BITS BY ADDRESS ................................................................................. 97 DIGITAL FILTER CHARACTERISTICS .............................................................114 TERMINOLOGY ........................................................................................................ 114 DAC FILTER RESPONSES....................................................................................... 115 ADC FILTER RESPONSES....................................................................................... 115 HIGHPASS FILTER................................................................................................... 116 |
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