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MSC7110 データシート(PDF) 4 Page - Freescale Semiconductor, Inc |
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MSC7110 データシート(HTML) 4 Page - Freescale Semiconductor, Inc |
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4 / 8 page ![]() MSC7110 Product Brief, Rev. 2 4 Freescale Semiconductor Features I2C Port • 2-wire serial interface through GPIO. • Filtered inputs for noise suppression. • Compatibility with I2C bus standard up to 100 kbps for standard mode and up to 400 kbps for Fast mode. • Bidirectional Data Transfer Protocol. • Multiple-master operation that also allows any number of devices implementing the I2C- master software module to access the memory simultaneously at boot or any time. • Compatible with the I2C-serial EEPROM access protocol, allowing memory access of up to one MB. General-Purpose I/O (GPIO) Port Bidirectional signal lines that either serve the peripherals or act as programmable I/O ports. Each port can be programmed separately to serve up to two dedicated peripherals. Programmable Interrupt Controller (PIC) Consolidates maskable interrupt and non-maskable interrupt sources. System Control • Reset controller. • Clock controller module. • Hardware bus monitors for the MSC7110 buses. • Software watchdog timer function. • fieldBIST™ hardware health diagnostics that can be invoked at power-up or off-line via software. •Event port. Internal PLL Generates up to 266 MHz clock for the SC1400 core and up to 133 MHz for the crossbar switch, DMA channels, M2 memory, and other peripherals. Clock Synthesis Module • Programmable low-power Stop and Wait modes. • Generation of all device clocks. • Halt and restart capability for on-chip peripherals. Reduced Power Dissipation • Separate power supply for internal logic and I/O. • Typical case power consumption of 300–400 mW • Low-power standby modes. • Optimized power management circuitry (instruction-dependent, peripheral-dependent, and mode-dependent). fieldBIST™ Hardware Diagnostics Detects and provides visibility into unlikely field failures for systems with high availability. The unique fieldBIST ensures that the device: • Has structural integrity. • Operates at the rated speed. • Is free from reliability defects. Diagnostics can report partial or complete device inoperability. fieldBIST resolution can pinpoint the following uniquely: • 6 memory blocks, including ROM • 3 logic levels (top, extended core, and peripherals) •1 PLL Simple JTAG interface allows easy integration to system firmware. Packaging 400 ball MAP-BGA. • 17 × 17 mm. • 0.8 mm pitch. • Pb-free or Pb-bearing spheres. Table 1. MSC7110 Features (Continued) Feature Description |
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