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3599F–DFLASH–09/06

AT26DF161

10. Status Register Commands

10.1

Read Status Register

The Status Register can be read to determine the device’s ready/busy status, as well as the sta-

tus of many other functions such as Hardware Locking and Software Protection. The Status

Register can be read at any time, including during an internally self-timed program or erase

operation.

To read the Status Register, the CS pin must first be asserted and the opcode of 05h must be

clocked into the device. After the last bit of the opcode has been clocked in, the device will begin

outputting Status Register data on the SO pin during every subsequent clock cycle. After the last

bit (bit 0) of the Status Register has been clocked out, the sequence will repeat itself starting

again with bit 7 as long as the CS pin remains asserted and the SCK pin is being pulsed. The

data in the Status Register is constantly being updated, so each repeating sequence will output

new data.

Deasserting the CS pin will terminate the Read Status Register operation and put the SO pin

into a high-impedance state. The CS pin can be deasserted at any time and does not require

that a full byte of data be read.

Notes:

1. Only bit 7 of the Status Register will be modified when using the Write Status Register command.

2. R/W = Readable and writeable

R = Readable only

Table 10-1.

Status Register Format

Bit(1)

Name

Type(2)

Description

7

SPRL

Sector Protection Registers Locked

R/W

0

Sector Protection Registers are unlocked (default).

1

Sector Protection Registers are locked.

6

RES

Reserved for future use

R

0

Reserved for future use.

5

EPE

Erase/Program Error

R

0

Erase or program operation was successful.

1

Erase or program error detected.

4

WPP

Write Protect (WP) Pin Status

R

0WP is asserted.

1WP is deasserted.

3:2

SWP

Software Protection Status

R

00

All sectors are software unprotected (all Sector

Protection Registers are 0).

01

Some sectors are software protected. Read individual

Sector Protection Registers to determine which

sectors are protected.

10

Reserved for future use.

11

All sectors are software protected (all Sector

Protection Registers are 1 – default).

1

WEL

Write Enable Latch Status

R

0

Device is not write enabled (default).

1

Device is write enabled.

0

RDY/BSY

Ready/Busy Status

R

0

Device is ready.

1

Device is busy with an internal operation.