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PLCDA03 データシート(PDF) 4 Page - Protek Devices

部品番号 PLCDA03
部品情報  ULTRA LOW CAPACITANCE TVS ARRAY
PDF  5 Pages
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メーカー  PROTEC [Protek Devices]
ホームページ  http://www.protekdevices.com
Logo PROTEC - Protek Devices

PLCDA03 データシート(HTML) 4 Page - Protek Devices

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PLCDA03
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PLCDA24
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05076.R8 2/07
www.protekdevices.com
APPLICATION NOTE
CIRCUIT BOARD LAYOUT RECOMMENDATIONS
Circuit board layout is critical for Electromagnetic
Compatibility (EMC) protection. The following
guidelines are recommended:
The protection device should be placed near the
input terminals or connectors, the device will
divert the transient current immediately before it
can be coupled into the nearby traces.
The path length between the TVS device and
the protected line should be minimized.
All conductive loops including power and ground
loops should be minimized.
The transient current return path to ground
should be kept as short as possible to reduce
parasitic inductance.
Ground planes should be used whenever
possible. For multilayer PCBs, use ground vias.
The PLCDA Series are low capacitance, bidirectional TVS arrays that are designed to protect I/O or high speed data lines from the damaging effects
of ESD or EFT. This product series has a surge capability of 500 Watts P
PP per line for an 8/20µs waveshape and offers ESD protection > 40kv.
BIDIRECTIONAL COMMON-MODE CONFIGURATION (Figure 1)
Ideal for use in USB applications, the PLCDA Series provides up to two (2) lines of protection in a common-mode configuration as depicted in Figure 1.
Circuit connectivity is as follows:
Pins 1 & 2 and 3 & 4 are connected to Ground
Pins 5 and 6 are connected to I/O Line D+
Pins 7 and 8 are connected to I/O Line D-
Figure 1. Typical Common-Mode USB Protection
Circuit
1
23
4
5
6
7
8
D+
D-
GND
USB
IC



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